// bfs_cuda.cu
#include <cuda_runtime.h>
#include <stdio.h>
#include <queue>

#define INF 1e9

// CUDA error checking
#define CHECK_CUDA(call) \
    if ((call) != cudaSuccess) { \
        fprintf(stderr, "CUDA error at %s:%d\n", __FILE__, __LINE__); \
        exit(1); \
    }

__global__ void bfs_kernel(
    int* d_row_offsets, int* d_col_indices, 
    int* d_distances, int* d_frontier, int* d_next_frontier, int num_nodes, bool* d_done
) {
    int idx = blockDim.x * blockIdx.x + threadIdx.x;
    if (idx >= num_nodes) return;

    if (d_frontier[idx]) {
        d_frontier[idx] = 0;
        int row_start = d_row_offsets[idx];
        int row_end = d_row_offsets[idx + 1];
        for (int edge = row_start; edge < row_end; edge++) {
            int neighbor = d_col_indices[edge];
            if (d_distances[neighbor] == INF) {
                d_distances[neighbor] = d_distances[idx] + 1;
                d_next_frontier[neighbor] = 1;
                *d_done = false;
            }
        }
    }
}

void bfs(
    int* h_row_offsets, int* h_col_indices, 
    int* h_distances, int num_nodes, int num_edges, int source
) {
    int *d_row_offsets, *d_col_indices;
    int *d_distances, *d_frontier, *d_next_frontier;
    bool *d_done;

    CHECK_CUDA(cudaMalloc(&d_row_offsets, (num_nodes + 1) * sizeof(int)));
    CHECK_CUDA(cudaMalloc(&d_col_indices, num_edges * sizeof(int)));
    CHECK_CUDA(cudaMalloc(&d_distances, num_nodes * sizeof(int)));
    CHECK_CUDA(cudaMalloc(&d_frontier, num_nodes * sizeof(int)));
    CHECK_CUDA(cudaMalloc(&d_next_frontier, num_nodes * sizeof(int)));
    CHECK_CUDA(cudaMalloc(&d_done, sizeof(bool)));

    CHECK_CUDA(cudaMemcpy(d_row_offsets, h_row_offsets, (num_nodes + 1) * sizeof(int), cudaMemcpyHostToDevice));
    CHECK_CUDA(cudaMemcpy(d_col_indices, h_col_indices, num_edges * sizeof(int), cudaMemcpyHostToDevice));
    CHECK_CUDA(cudaMemcpy(d_distances, h_distances, num_nodes * sizeof(int), cudaMemcpyHostToDevice));

    int block_size = 256;
    int num_blocks = (num_nodes + block_size - 1) / block_size;

    // Initialize frontier
    CHECK_CUDA(cudaMemset(d_frontier, 0, num_nodes * sizeof(int)));
    CHECK_CUDA(cudaMemset(d_next_frontier, 0, num_nodes * sizeof(int)));
    int one = 1;
    CHECK_CUDA(cudaMemcpy(d_frontier + source, &one, sizeof(int), cudaMemcpyHostToDevice));

    bool done;
    do {
        done = true;
        CHECK_CUDA(cudaMemcpy(d_done, &done, sizeof(bool), cudaMemcpyHostToDevice));

        bfs_kernel<<<num_blocks, block_size>>>(
            d_row_offsets, d_col_indices, d_distances, d_frontier, d_next_frontier, num_nodes, d_done
        );

        CHECK_CUDA(cudaDeviceSynchronize());

        CHECK_CUDA(cudaMemcpy(&done, d_done, sizeof(bool), cudaMemcpyDeviceToHost));

        // Swap frontiers
        int* temp = d_frontier;
        d_frontier = d_next_frontier;
        d_next_frontier = temp;
        CHECK_CUDA(cudaMemset(d_next_frontier, 0, num_nodes * sizeof(int)));

    } while (!done);

    // Copy result back
    CHECK_CUDA(cudaMemcpy(h_distances, d_distances, num_nodes * sizeof(int), cudaMemcpyDeviceToHost));

    cudaFree(d_row_offsets);
    cudaFree(d_col_indices);
    cudaFree(d_distances);
    cudaFree(d_frontier);
    cudaFree(d_next_frontier);
    cudaFree(d_done);
}

int main() {
    // Example graph (4 nodes, 5 edges)
    // Node 0 -> 1, 2
    // Node 1 -> 2
    // Node 2 -> 0, 3
    // Node 3 -> 3

    int h_row_offsets[] = {0, 2, 3, 5, 6};  // 4 nodes => 5 entries
    int h_col_indices[] = {1, 2, 2, 0, 3, 3}; // edges
    int num_nodes = 4;
    int num_edges = 6;
    int source = 2;

    int h_distances[4];
    for (int i = 0; i < num_nodes; i++) h_distances[i] = INF;
    h_distances[source] = 0;

    bfs(h_row_offsets, h_col_indices, h_distances, num_nodes, num_edges, source);

    printf("Distances from source node %d:\n", source);
    for (int i = 0; i < num_nodes; i++) {
        printf("Node %d: %d\n", i, h_distances[i]);
    }

    return 0;
}

	.file	"tmpxft_00047fcf_00000000-6_38.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2862:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2862:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb
	.type	_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb, @function
_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb:
.LFB2884:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movl	%r9d, 20(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z10bfs_kernelPiS_S_S_S_iPb(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2884:
	.size	_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb, .-_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb
	.globl	_Z10bfs_kernelPiS_S_S_S_iPb
	.type	_Z10bfs_kernelPiS_S_S_S_iPb, @function
_Z10bfs_kernelPiS_S_S_S_iPb:
.LFB2885:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb
	.cfi_endproc
.LFE2885:
	.size	_Z10bfs_kernelPiS_S_S_S_iPb, .-_Z10bfs_kernelPiS_S_S_S_iPb
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"38.cu"
.LC1:
	.string	"CUDA error at %s:%d\n"
	.text
	.globl	_Z3bfsPiS_S_iii
	.type	_Z3bfsPiS_S_iii, @function
_Z3bfsPiS_S_iii:
.LFB2858:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	1(%rcx), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%r14d, %r14
	movslq	%r8d, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	salq	$2, %r14
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	cudaMalloc@PLT
	movl	$45, %r8d
	testl	%eax, %eax
	jne	.L32
	salq	$2, %r13
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L10
	movl	$46, %r8d
.L32:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rdx
	xorl	%eax, %eax
	movl	$1, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L10:
	leaq	-4(%r14), %r12
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	$47, %r8d
	testl	%eax, %eax
	jne	.L32
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	$48, %r8d
	testl	%eax, %eax
	jne	.L32
	leaq	64(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	$49, %r8d
	testl	%eax, %eax
	jne	.L32
	leaq	72(%rsp), %rdi
	movl	$1, %esi
	call	cudaMalloc@PLT
	movl	$50, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	$52, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	call	cudaMemcpy@PLT
	movl	$53, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	$54, %r8d
	testl	%eax, %eax
	jne	.L32
	leal	255(%rbx), %eax
	movl	$256, %ecx
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	cltd
	idivl	%ecx
	movq	%r12, %rdx
	movl	%eax, %r13d
	call	cudaMemset@PLT
	movl	$60, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	64(%rsp), %rdi
	movq	%r12, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$61, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	56(%rsp), %rdx
	movslq	12(%rsp), %rax
	leaq	28(%rsp), %rsi
	movl	$1, %ecx
	movl	$1, 28(%rsp)
	movabsq	$4294967552, %r14
	leaq	(%rdx,%rax,4), %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$63, %r8d
	testl	%eax, %eax
	jne	.L32
.L20:
	leaq	27(%rsp), %r15
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movq	%r15, %rsi
	movb	$1, 27(%rsp)
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L21
	movl	$68, %r8d
	jmp	.L32
.L21:
	movl	%r13d, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	%ebx, %r9d
	pushq	80(%rsp)
	.cfi_def_cfa_offset 192
	movq	80(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z41__device_stub__Z10bfs_kernelPiS_S_S_S_iPbPiS_S_S_S_iPb
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
.L22:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L23
	movl	$74, %r8d
	jmp	.L32
.L23:
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movl	$1, %edx
	movq	%r15, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L24
	movl	$76, %r8d
	jmp	.L32
.L24:
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rax
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%rax, 56(%rsp)
	movq	%rdi, 64(%rsp)
	call	cudaMemset@PLT
	testl	%eax, %eax
	je	.L25
	movl	$82, %r8d
	jmp	.L32
.L25:
	cmpb	$0, 27(%rsp)
	je	.L20
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	$87, %r8d
	testl	%eax, %eax
	jne	.L32
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2858:
	.size	_Z3bfsPiS_S_iii, .-_Z3bfsPiS_S_iii
	.section	.rodata.str1.1
.LC2:
	.string	"Distances from source node %d:\n"
.LC3:
	.string	"Node %d: %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2859:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$2, %r9d
	movl	$6, %r8d
	movl	$4, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	leaq	.LC3(%rip), %r12
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$80, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$8589934592, %rax
	leaq	12(%rsp), %rbp
	leaq	48(%rsp), %rsi
	movl	$6, 44(%rsp)
	leaq	28(%rsp), %rdi
	movq	%rbp, %rdx
	movq	$2, 56(%rsp)
	movq	%rax, 28(%rsp)
	movabsq	$21474836483, %rax
	movq	%rax, 36(%rsp)
	movabsq	$8589934593, %rax
	movq	%rax, 48(%rsp)
	movabsq	$12884901891, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297000000000, %rax
	movq	%rax, 12(%rsp)
	subq	$1000000000, %rax
	movq	%rax, 20(%rsp)
	call	_Z3bfsPiS_S_iii
	movl	$2, %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$1, %edi
	call	__printf_chk@PLT
.L34:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L34
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$80, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2859:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10bfs_kernelPiS_S_S_S_iPb"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2887:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10bfs_kernelPiS_S_S_S_iPb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2887:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// bfs_amd_hip.cpp
#include <hip/hip_runtime.h>
#include <stdio.h>
#include <queue>

#define INF 1e9

// HIP error checking
#define CHECK_HIP(call) \
    if ((call) != hipSuccess) { \
        fprintf(stderr, "HIP error at %s:%d\n", __FILE__, __LINE__); \
        exit(1); \
    }

__global__ void bfs_kernel(
    int* d_row_offsets, int* d_col_indices,
    int* d_distances, int* d_frontier, int* d_next_frontier, int num_nodes, bool* d_done
) {
    int idx = blockDim.x * blockIdx.x + threadIdx.x;
    if (idx >= num_nodes) return;

    if (d_frontier[idx]) {
        d_frontier[idx] = 0;
        int row_start = d_row_offsets[idx];
        int row_end = d_row_offsets[idx + 1];
        for (int edge = row_start; edge < row_end; edge++) {
            int neighbor = d_col_indices[edge];
            if (d_distances[neighbor] == INF) {
                d_distances[neighbor] = d_distances[idx] + 1;
                d_next_frontier[neighbor] = 1;
                *d_done = false;
            }
        }
    }
}

void bfs(
    int* h_row_offsets, int* h_col_indices,
    int* h_distances, int num_nodes, int num_edges, int source
) {
    int *d_row_offsets, *d_col_indices;
    int *d_distances, *d_frontier, *d_next_frontier;
    bool *d_done;

    CHECK_HIP(hipMalloc(&d_row_offsets, (num_nodes + 1) * sizeof(int)));
    CHECK_HIP(hipMalloc(&d_col_indices, num_edges * sizeof(int)));
    CHECK_HIP(hipMalloc(&d_distances, num_nodes * sizeof(int)));
    CHECK_HIP(hipMalloc(&d_frontier, num_nodes * sizeof(int)));
    CHECK_HIP(hipMalloc(&d_next_frontier, num_nodes * sizeof(int)));
    CHECK_HIP(hipMalloc(&d_done, sizeof(bool)));

    CHECK_HIP(hipMemcpy(d_row_offsets, h_row_offsets, (num_nodes + 1) * sizeof(int), hipMemcpyHostToDevice));
    CHECK_HIP(hipMemcpy(d_col_indices, h_col_indices, num_edges * sizeof(int), hipMemcpyHostToDevice));
    CHECK_HIP(hipMemcpy(d_distances, h_distances, num_nodes * sizeof(int), hipMemcpyHostToDevice));

    int block_size = 256;
    int num_blocks = (num_nodes + block_size - 1) / block_size;

    // Initialize frontier
    CHECK_HIP(hipMemset(d_frontier, 0, num_nodes * sizeof(int)));
    CHECK_HIP(hipMemset(d_next_frontier, 0, num_nodes * sizeof(int)));
    int one = 1;
    CHECK_HIP(hipMemcpy(d_frontier + source, &one, sizeof(int), hipMemcpyHostToDevice));

    bool done;
    do {
        done = true;
        CHECK_HIP(hipMemcpy(d_done, &done, sizeof(bool), hipMemcpyHostToDevice));

        hipLaunchKernelGGL(
            bfs_kernel, dim3(num_blocks), dim3(block_size), 0, 0,
            d_row_offsets, d_col_indices, d_distances, d_frontier, d_next_frontier, num_nodes, d_done
        );

        CHECK_HIP(hipDeviceSynchronize());

        CHECK_HIP(hipMemcpy(&done, d_done, sizeof(bool), hipMemcpyDeviceToHost));

        // Swap frontiers
        int* temp = d_frontier;
        d_frontier = d_next_frontier;
        d_next_frontier = temp;
        CHECK_HIP(hipMemset(d_next_frontier, 0, num_nodes * sizeof(int)));

    } while (!done);

    // Copy result back
    CHECK_HIP(hipMemcpy(h_distances, d_distances, num_nodes * sizeof(int), hipMemcpyDeviceToHost));

    hipFree(d_row_offsets);
    hipFree(d_col_indices);
    hipFree(d_distances);
    hipFree(d_frontier);
    hipFree(d_next_frontier);
    hipFree(d_done);
}

int main() {
    // Example graph (4 nodes, 5 edges)
    // Node 0 -> 1, 2
    // Node 1 -> 2
    // Node 2 -> 0, 3
    // Node 3 -> 3

    int h_row_offsets[] = {0, 2, 3, 5, 6};  // 4 nodes => 5 entries
    int h_col_indices[] = {1, 2, 2, 0, 3, 3}; // edges
    int num_nodes = 4;
    int num_edges = 6;
    int source = 2;

    int h_distances[4];
    for (int i = 0; i < num_nodes; i++) h_distances[i] = INF;
    h_distances[source] = 0;

    bfs(h_row_offsets, h_col_indices, h_distances, num_nodes, num_edges, source);

    printf("Distances from source node %d:\n", source);
    for (int i = 0; i < num_nodes; i++) {
        printf("Node %d: %d\n", i, h_distances[i]);
    }

    return 0;
}

	.text
	.file	"38.cpp"
	.globl	_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb # -- Begin function _Z25__device_stub__bfs_kernelPiS_S_S_S_iPb
	.p2align	4, 0x90
	.type	_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb,@function
_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb: # @_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb
	.cfi_startproc
# %bb.0:
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 88(%rsp)
	movq	%rsi, 80(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%r8, 56(%rsp)
	movl	%r9d, 4(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z10bfs_kernelPiS_S_S_S_iPb, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$168, %rsp
	.cfi_adjust_cfa_offset -168
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb, .Lfunc_end0-_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb
	.cfi_endproc
                                        # -- End function
	.globl	_Z3bfsPiS_S_iii                 # -- Begin function _Z3bfsPiS_S_iii
	.p2align	4, 0x90
	.type	_Z3bfsPiS_S_iii,@function
_Z3bfsPiS_S_iii:                        # @_Z3bfsPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 60(%rsp)                  # 4-byte Spill
	movl	%r8d, %r12d
	movl	%ecx, %r15d
	movq	%rdx, 72(%rsp)                  # 8-byte Spill
	movq	%rsi, %rbx
	movq	%rdi, %r13
	movslq	%ecx, %r14
	leaq	4(,%r14,4), %rbp
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:
	movslq	%r12d, %r12
	shlq	$2, %r12
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:
	shlq	$2, %r14
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	leaq	24(%rsp), %rdi
	movl	$1, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movq	40(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.17:
	movq	32(%rsp), %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	leal	255(%r15), %eax
	leal	510(%r15), %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.21:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.23:
	movl	$1, 64(%rsp)
	movslq	60(%rsp), %rdi                  # 4-byte Folded Reload
	shlq	$2, %rdi
	addq	8(%rsp), %rdi
	leaq	64(%rsp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	sarl	$8, %ebx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	%ebx, %r13d
	orq	%r12, %r13
	leaq	7(%rsp), %rbp
	addq	$256, %r12                      # imm = 0x100
	leaq	176(%rsp), %rbx
	.p2align	4, 0x90
.LBB1_26:                               # =>This Inner Loop Header: Depth=1
	movb	$1, 7(%rsp)
	movq	24(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_27
# %bb.28:                               #   in Loop: Header=BB1_26 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.29:                               #   in Loop: Header=BB1_26 Depth=1
	movq	48(%rsp), %rax
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	24(%rsp), %r8
	movq	%rax, 168(%rsp)
	movq	%rcx, 160(%rsp)
	movq	%rdx, 152(%rsp)
	movq	%rsi, 144(%rsp)
	movq	%rdi, 136(%rsp)
	movl	%r15d, 68(%rsp)
	movq	%r8, 128(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	144(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	112(%rsp), %rdi
	leaq	96(%rsp), %rsi
	leaq	88(%rsp), %rdx
	leaq	80(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	movq	96(%rsp), %rcx
	movl	104(%rsp), %r8d
	movl	$_Z10bfs_kernelPiS_S_S_S_iPb, %edi
	movq	%rbx, %r9
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_30:                               #   in Loop: Header=BB1_26 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.32:                               #   in Loop: Header=BB1_26 Depth=1
	movq	24(%rsp), %rsi
	movl	$1, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_33
# %bb.34:                               #   in Loop: Header=BB1_26 Depth=1
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%rdi, 16(%rsp)
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	hipMemset
	testl	%eax, %eax
	jne	.LBB1_35
# %bb.36:                               #   in Loop: Header=BB1_26 Depth=1
	cmpb	$0, 7(%rsp)
	je	.LBB1_26
# %bb.37:
	movq	32(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_38
# %bb.39:
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_35:
	.cfi_def_cfa_offset 288
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$83, %ecx
	jmp	.LBB1_2
.LBB1_33:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$77, %ecx
	jmp	.LBB1_2
.LBB1_31:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$75, %ecx
	jmp	.LBB1_2
.LBB1_27:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$68, %ecx
.LBB1_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.LBB1_1:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$45, %ecx
	jmp	.LBB1_2
.LBB1_4:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$46, %ecx
	jmp	.LBB1_2
.LBB1_6:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$47, %ecx
	jmp	.LBB1_2
.LBB1_8:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$48, %ecx
	jmp	.LBB1_2
.LBB1_10:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$49, %ecx
	jmp	.LBB1_2
.LBB1_12:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$50, %ecx
	jmp	.LBB1_2
.LBB1_14:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$52, %ecx
	jmp	.LBB1_2
.LBB1_16:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$53, %ecx
	jmp	.LBB1_2
.LBB1_18:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$54, %ecx
	jmp	.LBB1_2
.LBB1_20:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$60, %ecx
	jmp	.LBB1_2
.LBB1_22:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$61, %ecx
	jmp	.LBB1_2
.LBB1_24:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$63, %ecx
	jmp	.LBB1_2
.LBB1_38:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$88, %ecx
	jmp	.LBB1_2
.Lfunc_end1:
	.size	_Z3bfsPiS_S_iii, .Lfunc_end1-_Z3bfsPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	5                               # 0x5
.LCPI2_1:
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	2                               # 0x2
	.long	0                               # 0x0
	.text
	.globl	main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$80, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -16
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [0,2,3,5]
	movaps	%xmm0, 16(%rsp)
	movl	$6, 32(%rsp)
	movaps	.LCPI2_1(%rip), %xmm0           # xmm0 = [1,2,2,0]
	movaps	%xmm0, 48(%rsp)
	movabsq	$12884901891, %rax              # imm = 0x300000003
	movq	%rax, 64(%rsp)
	xorl	%eax, %eax
	.p2align	4, 0x90
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1000000000, (%rsp,%rax,4)      # imm = 0x3B9ACA00
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB2_1
# %bb.2:
	movl	$0, 8(%rsp)
	leaq	16(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movq	%rsp, %rdx
	movl	$4, %ecx
	movl	$6, %r8d
	movl	$2, %r9d
	callq	_Z3bfsPiS_S_iii
	movl	$.L.str.2, %edi
	movl	$2, %esi
	xorl	%eax, %eax
	callq	printf
	xorl	%ebx, %ebx
	.p2align	4, 0x90
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	movl	(%rsp,%rbx,4), %edx
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB2_3
# %bb.4:
	xorl	%eax, %eax
	addq	$80, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	movq	__hip_gpubin_handle(%rip), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10bfs_kernelPiS_S_S_S_iPb, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10bfs_kernelPiS_S_S_S_iPb,@object # @_Z10bfs_kernelPiS_S_S_S_iPb
	.section	.rodata,"a",@progbits
	.globl	_Z10bfs_kernelPiS_S_S_S_iPb
	.p2align	3, 0x0
_Z10bfs_kernelPiS_S_S_S_iPb:
	.quad	_Z25__device_stub__bfs_kernelPiS_S_S_S_iPb
	.size	_Z10bfs_kernelPiS_S_S_S_iPb, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"HIP error at %s:%d\n"
	.size	.L.str, 20

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"38.cpp"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Distances from source node %d:\n"
	.size	.L.str.2, 32

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Node %d: %d\n"
	.size	.L.str.3, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10bfs_kernelPiS_S_S_S_iPb"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__bfs_kernelPiS_S_S_S_iPb
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10bfs_kernelPiS_S_S_S_iPb
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10bfs_kernelPiS_S_S_S_iPb ; -- Begin function _Z10bfs_kernelPiS_S_S_S_iPb
	.globl	_Z10bfs_kernelPiS_S_S_S_iPb
	.p2align	8
	.type	_Z10bfs_kernelPiS_S_S_S_iPb,@function
_Z10bfs_kernelPiS_S_S_S_iPb:            ; @_Z10bfs_kernelPiS_S_S_S_iPb
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v2
	s_cbranch_execz .LBB0_7
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x18
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.2:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mov_b32_e32 v10, 0
	global_store_b32 v[0:1], v10, off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b64 v[0:1], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.3:                                ; %.lr.ph
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b64 s[8:9], s[0:1], 0x30
	v_ashrrev_i32_e32 v5, 31, v0
	v_dual_mov_b32 v4, v0 :: v_dual_mov_b32 v11, 1
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_set_inst_prefetch_distance 0x1
	s_branch .LBB0_5
	.p2align	6
.LBB0_4:                                ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, 1, v0
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	v_cmp_ge_i32_e32 vcc_lo, v0, v1
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_7
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[4:5], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v12, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0x3b9aca00, v12
	s_cbranch_execz .LBB0_4
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	global_load_b32 v12, v[2:3], off
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, 1, v12
	global_store_b32 v[6:7], v12, off
	global_store_b32 v[8:9], v11, off
	global_store_b8 v10, v13, s[8:9]
	s_branch .LBB0_4
.LBB0_7:                                ; %.loopexit
	s_set_inst_prefetch_distance 0x2
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10bfs_kernelPiS_S_S_S_iPb
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10bfs_kernelPiS_S_S_S_iPb, .Lfunc_end0-_Z10bfs_kernelPiS_S_S_S_iPb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10bfs_kernelPiS_S_S_S_iPb
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10bfs_kernelPiS_S_S_S_iPb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
