#include <stdio.h>

// CUDA kernel for 1D convolution with stride and padding
__global__ void conv1D(float* input, float* kernel, float* output, 
                      int inputLength, int kernelLength, 
                      int outputLength, int stride, int padding) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    
    if (idx < outputLength) {
        float sum = 0.0f;
        int startIdx = idx * stride - padding;
        
        for (int k = 0; k < kernelLength; k++) {
            int inputIdx = startIdx + k;
            // Only use valid input positions, treat padding as zeros
            if (inputIdx >= 0 && inputIdx < inputLength) {
                sum += input[inputIdx] * kernel[k];
            }
            // Note: If inputIdx is outside valid range, we effectively add 0
        }
        
        output[idx] = sum;
    }
}

// Helper function to calculate output size
int calculateOutputSize(int inputSize, int kernelSize, int stride, int padding) {
    return (inputSize + 2 * padding - kernelSize) / stride + 1;
}

// Host function to set up and run the convolution
void runConv1D(float* h_input, float* h_kernel, float* h_output,
              int inputLength, int kernelLength, int stride, int padding) {
    
    // Calculate output size
    int outputLength = calculateOutputSize(inputLength, kernelLength, stride, padding);
    
    // Allocate device memory
    float *d_input, *d_kernel, *d_output;
    cudaMalloc(&d_input, inputLength * sizeof(float));
    cudaMalloc(&d_kernel, kernelLength * sizeof(float));
    cudaMalloc(&d_output, outputLength * sizeof(float));
    
    // Copy data from host to device
    cudaMemcpy(d_input, h_input, inputLength * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_kernel, h_kernel, kernelLength * sizeof(float), cudaMemcpyHostToDevice);
    
    // Initialize output to zeros
    cudaMemset(d_output, 0, outputLength * sizeof(float));
    
    // Set up grid and block dimensions
    int blockSize = 256;
    int gridSize = (outputLength + blockSize - 1) / blockSize;
    
    // Launch kernel
    conv1D<<<gridSize, blockSize>>>(d_input, d_kernel, d_output, 
                                   inputLength, kernelLength, 
                                   outputLength, stride, padding);
    
    // Check for any kernel launch errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        printf("CUDA Error: %s\n", cudaGetErrorString(err));
    }
    
    // Copy result back to host
    cudaMemcpy(h_output, d_output, outputLength * sizeof(float), cudaMemcpyDeviceToHost);
    
    // Free device memory
    cudaFree(d_input);
    cudaFree(d_kernel);
    cudaFree(d_output);
}

// Example usage
int main() {
    // Example parameters
    int inputLength = 10; // Using a smaller array for easier debugging
    int kernelLength = 3; 
    int stride = 1;
    int padding = 1;
    int outputLength = calculateOutputSize(inputLength, kernelLength, stride, padding);
    
    printf("Input length: %d, Kernel length: %d\n", inputLength, kernelLength);
    printf("Stride: %d, Padding: %d\n", stride, padding);
    printf("Output length: %d\n", outputLength);
    
    // Allocate host memory
    float *h_input = (float*)malloc(inputLength * sizeof(float));
    float *h_kernel = (float*)malloc(kernelLength * sizeof(float));
    float *h_output = (float*)malloc(outputLength * sizeof(float));
    
    // Initialize input with increasing values
    printf("Input values:\n");
    for (int i = 0; i < inputLength; i++) {
        h_input[i] = (float)(i + 1); // Values 1 to 10
        printf("%0.1f ", h_input[i]);
    }
    printf("\n");
    
    // Initialize kernel with simple weights
    printf("Kernel values:\n");
    for (int i = 0; i < kernelLength; i++) {
        h_kernel[i] = 1.0f; // Simple kernel of all 1's
        printf("%0.1f ", h_kernel[i]);
    }
    printf("\n");
    
    // Run convolution
    runConv1D(h_input, h_kernel, h_output, inputLength, kernelLength, stride, padding);
    
    // Print output values
    printf("Output values:\n");
    for (int i = 0; i < outputLength; i++) {
        printf("output[%d] = %0.1f\n", i, h_output[i]);
    }
    
    // Free host memory
    free(h_input);
    free(h_kernel);
    free(h_output);
    
    return 0;
}
	.file	"tmpxft_00047d86_00000000-6_21.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB1984:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE1984:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z19calculateOutputSizeiiii
	.type	_Z19calculateOutputSizeiiii, @function
_Z19calculateOutputSizeiiii:
.LFB1979:
	.cfi_startproc
	endbr64
	leal	(%rdi,%rcx,2), %eax
	movl	%edx, %r8d
	subl	%esi, %eax
	cltd
	idivl	%r8d
	incl	%eax
	ret
	.cfi_endproc
.LFE1979:
	.size	_Z19calculateOutputSizeiiii, .-_Z19calculateOutputSizeiiii
	.globl	_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii
	.type	_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii, @function
_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii:
.LFB2006:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z6conv1DPfS_S_iiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L3:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2006:
	.size	_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii, .-_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii
	.globl	_Z6conv1DPfS_S_iiiii
	.type	_Z6conv1DPfS_S_iiiii, @function
_Z6conv1DPfS_S_iiiii:
.LFB2007:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii
	.cfi_endproc
.LFE2007:
	.size	_Z6conv1DPfS_S_iiiii, .-_Z6conv1DPfS_S_iiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Error: %s\n"
	.text
	.globl	_Z9runConv1DPfS_S_iiii
	.type	_Z9runConv1DPfS_S_iiii, @function
_Z9runConv1DPfS_S_iiii:
.LFB1980:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	movl	176(%rsp), %eax
	leal	(%rcx,%rax,2), %eax
	subl	%r8d, %eax
	cltd
	idivl	%r9d
	movslq	%ecx, %rdx
	salq	$2, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	leal	1(%rax), %r15d
	movl	%eax, 12(%rsp)
	call	cudaMalloc@PLT
	movslq	%ebx, %r8
	movslq	%r15d, %r12
	leaq	64(%rsp), %rdi
	salq	$2, %r8
	salq	$2, %r12
	movq	%r8, %rsi
	movq	%r8, 16(%rsp)
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	call	cudaMemset@PLT
	movl	12(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$256, %ecx
	addl	$256, %eax
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movl	176(%rsp), %eax
	movl	%r15d, %r9d
	movl	%ebx, %r8d
	movl	%r13d, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	%rbp
	.cfi_def_cfa_offset 192
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z34__device_stub__Z6conv1DPfS_S_iiiiiPfS_S_iiiii
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L10:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$1, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L11:
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1980:
	.size	_Z9runConv1DPfS_S_iiii, .-_Z9runConv1DPfS_S_iiii
	.section	.rodata.str1.1
.LC1:
	.string	"Input length: %d, Kernel length: %d\n"
.LC2:
	.string	"Stride: %d, Padding: %d\n"
.LC3:
	.string	"Output length: %d\n"
.LC4:
	.string	"Input values:\n"
.LC5:
	.string	"%0.1f "
.LC6:
	.string	"\n"
.LC7:
	.string	"Kernel values:\n"
.LC10:
	.string	"Output values:\n"
.LC11:
	.string	"output[%d] = %0.1f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB1981:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$3, %ecx
	movl	$10, %edx
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC1(%rip), %rsi
	movl	$1, %edi
	leaq	.LC5(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$1, %ebx
	pushq	%r8
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
	movl	$1, %ecx
	movl	$1, %edx
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movl	$1, %edi
	call	__printf_chk@PLT
	movl	$10, %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$1, %edi
	call	__printf_chk@PLT
	movl	$40, %edi
	call	malloc@PLT
	movl	$12, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$40, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	$1, %edi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	cvtsi2ssl	%ebx, %xmm0
	movq	%r14, %rsi
	movl	$1, %edi
	movb	$1, %al
	movss	%xmm0, -4(%r13,%rbx,4)
	incq	%rbx
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	cmpq	$11, %rbx
	jne	.L18
	leaq	.LC6(%rip), %r15
	movl	$1, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movq	%r15, %rsi
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	movsd	.LC9(%rip), %xmm0
	movq	%r14, %rsi
	movl	$1, %edi
	movb	$1, %al
	movl	$0x3f800000, (%r12,%rbx,4)
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$3, %rbx
	jne	.L19
	movq	%r15, %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movq	%r13, %rdi
	pushq	%rcx
	.cfi_def_cfa_offset 72
	movl	$1, %r9d
	movl	$3, %r8d
	movl	$10, %ecx
	pushq	$1
	.cfi_def_cfa_offset 80
	leaq	.LC11(%rip), %r14
	call	_Z9runConv1DPfS_S_iiii
	popq	%rsi
	.cfi_def_cfa_offset 72
	xorl	%eax, %eax
	popq	%rdi
	.cfi_def_cfa_offset 64
	leaq	.LC10(%rip), %rsi
	movl	$1, %edi
	call	__printf_chk@PLT
.L20:
	movl	%ebx, %edx
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r14, %rsi
	movb	$1, %al
	movl	$1, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$10, %rbx
	jne	.L20
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	popq	%rdx
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1981:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z6conv1DPfS_S_iiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6conv1DPfS_S_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2009:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC9:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

// HIP kernel for 1D convolution with stride and padding
__global__ void conv1D(float* input, float* kernel, float* output, 
                      int inputLength, int kernelLength, 
                      int outputLength, int stride, int padding) {
    int idx = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x;
    
    if (idx < outputLength) {
        float sum = 0.0f;
        int startIdx = idx * stride - padding;
        
        for (int k = 0; k < kernelLength; k++) {
            int inputIdx = startIdx + k;
            // Only use valid input positions, treat padding as zeros
            if (inputIdx >= 0 && inputIdx < inputLength) {
                sum += input[inputIdx] * kernel[k];
            }
            // Note: If inputIdx is outside valid range, we effectively add 0
        }
        
        output[idx] = sum;
    }
}

// Helper function to calculate output size
int calculateOutputSize(int inputSize, int kernelSize, int stride, int padding) {
    return (inputSize + 2 * padding - kernelSize) / stride + 1;
}

// Host function to set up and run the convolution
void runConv1D(float* h_input, float* h_kernel, float* h_output,
              int inputLength, int kernelLength, int stride, int padding) {
    
    // Calculate output size
    int outputLength = calculateOutputSize(inputLength, kernelLength, stride, padding);
    
    // Allocate device memory
    float *d_input, *d_kernel, *d_output;
    hipMalloc(&d_input, inputLength * sizeof(float));
    hipMalloc(&d_kernel, kernelLength * sizeof(float));
    hipMalloc(&d_output, outputLength * sizeof(float));
    
    // Copy data from host to device
    hipMemcpy(d_input, h_input, inputLength * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_kernel, h_kernel, kernelLength * sizeof(float), hipMemcpyHostToDevice);
    
    // Initialize output to zeros
    hipMemset(d_output, 0, outputLength * sizeof(float));
    
    // Set up grid and block dimensions
    int blockSize = 256;
    int gridSize = (outputLength + blockSize - 1) / blockSize;
    
    // Launch kernel
    hipLaunchKernelGGL(conv1D, 
                      dim3(gridSize), 
                      dim3(blockSize), 
                      0, 0,
                      d_input, d_kernel, d_output, 
                      inputLength, kernelLength, 
                      outputLength, stride, padding);
    
    // Check for any kernel launch errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        printf("HIP Error: %s\n", hipGetErrorString(err));
    }
    
    // Copy result back to host
    hipMemcpy(h_output, d_output, outputLength * sizeof(float), hipMemcpyDeviceToHost);
    
    // Free device memory
    hipFree(d_input);
    hipFree(d_kernel);
    hipFree(d_output);
}

// Example usage
int main() {
    // Example parameters
    int inputLength = 10; // Using a smaller array for easier debugging
    int kernelLength = 3; 
    int stride = 1;
    int padding = 1;
    int outputLength = calculateOutputSize(inputLength, kernelLength, stride, padding);
    
    printf("Input length: %d, Kernel length: %d\n", inputLength, kernelLength);
    printf("Stride: %d, Padding: %d\n", stride, padding);
    printf("Output length: %d\n", outputLength);
    
    // Allocate host memory
    float *h_input = (float*)malloc(inputLength * sizeof(float));
    float *h_kernel = (float*)malloc(kernelLength * sizeof(float));
    float *h_output = (float*)malloc(outputLength * sizeof(float));
    
    // Initialize input with increasing values
    printf("Input values:\n");
    for (int i = 0; i < inputLength; i++) {
        h_input[i] = (float)(i + 1); // Values 1 to 10
        printf("%0.1f ", h_input[i]);
    }
    printf("\n");
    
    // Initialize kernel with simple weights
    printf("Kernel values:\n");
    for (int i = 0; i < kernelLength; i++) {
        h_kernel[i] = 1.0f; // Simple kernel of all 1's
        printf("%0.1f ", h_kernel[i]);
    }
    printf("\n");
    
    // Run convolution
    runConv1D(h_input, h_kernel, h_output, inputLength, kernelLength, stride, padding);
    
    // Print output values
    printf("Output values:\n");
    for (int i = 0; i < outputLength; i++) {
        printf("output[%d] = %0.1f\n", i, h_output[i]);
    }
    
    // Free host memory
    free(h_input);
    free(h_kernel);
    free(h_output);
    
    return 0;
}
	.text
	.file	"21.cpp"
	.globl	_Z21__device_stub__conv1DPfS_S_iiiii # -- Begin function _Z21__device_stub__conv1DPfS_S_iiiii
	.p2align	4, 0x90
	.type	_Z21__device_stub__conv1DPfS_S_iiiii,@function
_Z21__device_stub__conv1DPfS_S_iiiii:   # @_Z21__device_stub__conv1DPfS_S_iiiii
	.cfi_startproc
# %bb.0:
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 88(%rsp)
	movq	%rsi, 80(%rsp)
	movq	%rdx, 72(%rsp)
	movl	%ecx, 20(%rsp)
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z6conv1DPfS_S_iiiii, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$184, %rsp
	.cfi_adjust_cfa_offset -184
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__conv1DPfS_S_iiiii, .Lfunc_end0-_Z21__device_stub__conv1DPfS_S_iiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19calculateOutputSizeiiii     # -- Begin function _Z19calculateOutputSizeiiii
	.p2align	4, 0x90
	.type	_Z19calculateOutputSizeiiii,@function
_Z19calculateOutputSizeiiii:            # @_Z19calculateOutputSizeiiii
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
	movl	%edx, %r8d
                                        # kill: def $edi killed $edi def $rdi
	subl	%esi, %edi
	leal	(%rdi,%rcx,2), %eax
	cltd
	idivl	%r8d
	incl	%eax
	retq
.Lfunc_end1:
	.size	_Z19calculateOutputSizeiiii, .Lfunc_end1-_Z19calculateOutputSizeiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9runConv1DPfS_S_iiii          # -- Begin function _Z9runConv1DPfS_S_iiii
	.p2align	4, 0x90
	.type	_Z9runConv1DPfS_S_iiii,@function
_Z9runConv1DPfS_S_iiii:                 # @_Z9runConv1DPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbp
	movl	272(%rsp), %edx
	movl	%ecx, %eax
	subl	%r8d, %eax
	leal	(%rax,%rdx,2), %eax
	cltd
	movl	%r9d, 40(%rsp)                  # 4-byte Spill
	idivl	%r9d
	movl	%eax, %r13d
	movl	%ecx, 32(%rsp)                  # 4-byte Spill
	movslq	%ecx, %r14
	shlq	$2, %r14
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%ebx, 36(%rsp)                  # 4-byte Spill
	movslq	%ebx, %r15
	shlq	$2, %r15
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%r13d, %rax
	leaq	4(,%rax,4), %rbx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leal	256(%r13), %eax
	leal	511(%r13), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	%rdx, %rdi
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	incl	%r13d
	movq	24(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	%rax, 136(%rsp)
	movq	%rcx, 128(%rsp)
	movq	%rdx, 120(%rsp)
	movl	32(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 60(%rsp)
	movl	36(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 56(%rsp)
	movl	%r13d, 52(%rsp)
	movl	40(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 48(%rsp)
	movl	272(%rsp), %eax
	movl	%eax, 44(%rsp)
	leaq	136(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	60(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rdi
	leaq	88(%rsp), %rsi
	leaq	80(%rsp), %rdx
	leaq	72(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	movq	88(%rsp), %rcx
	movl	96(%rsp), %r8d
	leaq	144(%rsp), %r9
	movl	$_Z6conv1DPfS_S_iiiii, %edi
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB2_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_4:
	movq	8(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9runConv1DPfS_S_iiii, .Lfunc_end2-_Z9runConv1DPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r12d, %r12d
	movl	$.L.str.1, %edi
	movl	$10, %esi
	movl	$3, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movl	$1, %esi
	movl	$1, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$10, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$40, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$12, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$40, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$.Lstr, %edi
	callq	puts@PLT
	.p2align	4, 0x90
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%r12), %r13
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r13d, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r13d, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	%r13, %r12
	cmpq	$10, %r13
	jne	.LBB3_1
# %bb.2:
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
	.p2align	4, 0x90
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%r12,4)      # imm = 0x3F800000
	movl	$.L.str.5, %edi
	movsd	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$3, %r12
	jne	.LBB3_3
# %bb.4:
	movl	$10, %edi
	callq	putchar@PLT
	movl	$1, (%rsp)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$10, %ecx
	movl	$3, %r8d
	movl	$1, %r9d
	callq	_Z9runConv1DPfS_S_iiii
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
	.p2align	4, 0x90
.LBB3_5:                                # =>This Inner Loop Header: Depth=1
	movss	(%r15,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.9, %edi
	movl	%r12d, %esi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB3_5
# %bb.6:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	movq	__hip_gpubin_handle(%rip), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6conv1DPfS_S_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6conv1DPfS_S_iiiii,@object    # @_Z6conv1DPfS_S_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z6conv1DPfS_S_iiiii
	.p2align	3, 0x0
_Z6conv1DPfS_S_iiiii:
	.quad	_Z21__device_stub__conv1DPfS_S_iiiii
	.size	_Z6conv1DPfS_S_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"HIP Error: %s\n"
	.size	.L.str, 15

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Input length: %d, Kernel length: %d\n"
	.size	.L.str.1, 37

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Stride: %d, Padding: %d\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Output length: %d\n"
	.size	.L.str.3, 19

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%0.1f "
	.size	.L.str.5, 7

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"output[%d] = %0.1f\n"
	.size	.L.str.9, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6conv1DPfS_S_iiiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Input values:"
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Kernel values:"
	.size	.Lstr.1, 15

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Output values:"
	.size	.Lstr.2, 15

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__conv1DPfS_S_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6conv1DPfS_S_iiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6conv1DPfS_S_iiiii    ; -- Begin function _Z6conv1DPfS_S_iiiii
	.globl	_Z6conv1DPfS_S_iiiii
	.p2align	8
	.type	_Z6conv1DPfS_S_iiiii,@function
_Z6conv1DPfS_S_iiiii:                   ; @_Z6conv1DPfS_S_iiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:
	s_load_b32 s3, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b64 s[10:11], s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x18
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v0, v1, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v2, s11, v0
	v_mov_b32_e32 v0, v3
	s_branch .LBB0_4
	.p2align	6
.LBB0_3:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s3, s3, -1
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_7
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s2, s8, v2
	s_and_b32 s9, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s9
	s_cbranch_execz .LBB0_3
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_load_b32 s9, s[6:7], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s9, v4
	s_branch .LBB0_3
.LBB0_6:
	v_mov_b32_e32 v0, 0
.LBB0_7:                                ; %Flow46
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6conv1DPfS_S_iiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6conv1DPfS_S_iiiii, .Lfunc_end0-_Z6conv1DPfS_S_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 320
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6conv1DPfS_S_iiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6conv1DPfS_S_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
