#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <math.h>

// Grid dimensions
#define IX(i,j) ((i)+(N+2)*(j))
#define SWAP(x0,x) {float *tmp=x0;x0=x;x=tmp;}

typedef struct {
    float dt;          // time step
    float diff;        // diffusion rate
    float visc;        // viscosity
    float *u, *v;      // velocity field
    float *u_prev, *v_prev;
    float *dens, *dens_prev;  // density field
    int N;             // grid size
} FluidCube;

// CUDA Kernel for linear solving step (Gauss-Seidel relaxation)
__global__ void lin_solve_kernel(int N, int b, float* x, float* x0, float a, float c) {
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    int j = blockIdx.y * blockDim.y + threadIdx.y + 1;
    
    if (i <= N && j <= N) {
        x[IX(i,j)] = (x0[IX(i,j)] + a * (x[IX(i-1,j)] + x[IX(i+1,j)] + 
                                          x[IX(i,j-1)] + x[IX(i,j+1)])) / c;
    }
}

// CUDA Kernel for diffusion step
__global__ void diffuse_kernel(int N, int b, float* x, float* x0, float diff, float dt) {
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    int j = blockIdx.y * blockDim.y + threadIdx.y + 1;
    
    if (i <= N && j <= N) {
        float a = dt * diff * N * N;
        x[IX(i,j)] = (x0[IX(i,j)] + a * (x0[IX(i-1,j)] + x0[IX(i+1,j)] + 
                                          x0[IX(i,j-1)] + x0[IX(i,j+1)])) / (1 + 4 * a);
    }
}

// CUDA Kernel for advection step
__global__ void advect_kernel(int N, int b, float* d, float* d0, float* u, float* v, float dt) {
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    int j = blockIdx.y * blockDim.y + threadIdx.y + 1;
    
    if (i <= N && j <= N) {
        float x = i - dt * N * u[IX(i,j)];
        float y = j - dt * N * v[IX(i,j)];
        
        if (x < 0.5f) x = 0.5f; if (x > N + 0.5f) x = N + 0.5f;
        if (y < 0.5f) y = 0.5f; if (y > N + 0.5f) y = N + 0.5f;
        
        int i0 = (int)x;
        int i1 = i0 + 1;
        int j0 = (int)y;
        int j1 = j0 + 1;
        
        float s1 = x - i0;
        float s0 = 1 - s1;
        float t1 = y - j0;
        float t0 = 1 - t1;
        
        d[IX(i,j)] = s0 * (t0 * d0[IX(i0,j0)] + t1 * d0[IX(i0,j1)]) +
                     s1 * (t0 * d0[IX(i1,j0)] + t1 * d0[IX(i1,j1)]);
    }
}

// CUDA Kernel for projection step - compute divergence
__global__ void project_kernel1(int N, float* u, float* v, float* p, float* div) {
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    int j = blockIdx.y * blockDim.y + threadIdx.y + 1;
    
    if (i <= N && j <= N) {
        div[IX(i,j)] = -0.5f * (u[IX(i+1,j)] - u[IX(i-1,j)] + 
                              v[IX(i,j+1)] - v[IX(i,j-1)]) / N;
        p[IX(i,j)] = 0;
    }
}

// CUDA Kernel for projection step - subtract gradient
__global__ void project_kernel2(int N, float* u, float* v, float* p) {
    int i = blockIdx.x * blockDim.x + threadIdx.x + 1;
    int j = blockIdx.y * blockDim.y + threadIdx.y + 1;
    
    if (i <= N && j <= N) {
        u[IX(i,j)] -= 0.5f * N * (p[IX(i+1,j)] - p[IX(i-1,j)]);
        v[IX(i,j)] -= 0.5f * N * (p[IX(i,j+1)] - p[IX(i,j-1)]);
    }
}

// CUDA Kernel for setting boundary conditions
__global__ void set_bnd_kernel(int N, int b, float* x) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    
    // Handle boundaries
    if (i == 0 && j <= N+1) {  // Left boundary
        x[IX(0,j)] = b == 1 ? -x[IX(1,j)] : x[IX(1,j)];
    }
    if (i == N+1 && j <= N+1) {  // Right boundary
        x[IX(N+1,j)] = b == 1 ? -x[IX(N,j)] : x[IX(N,j)];
    }
    if (j == 0 && i <= N+1) {  // Bottom boundary
        x[IX(i,0)] = b == 2 ? -x[IX(i,1)] : x[IX(i,1)];
    }
    if (j == N+1 && i <= N+1) {  // Top boundary
        x[IX(i,N+1)] = b == 2 ? -x[IX(i,N)] : x[IX(i,N)];
    }
    
    // Handle corners
    if (i == 0 && j == 0) {  // Bottom-left corner
        x[IX(0,0)] = 0.5f * (x[IX(1,0)] + x[IX(0,1)]);
    }
    if (i == 0 && j == N+1) {  // Top-left corner
        x[IX(0,N+1)] = 0.5f * (x[IX(1,N+1)] + x[IX(0,N)]);
    }
    if (i == N+1 && j == 0) {  // Bottom-right corner
        x[IX(N+1,0)] = 0.5f * (x[IX(N,0)] + x[IX(N+1,1)]);
    }
    if (i == N+1 && j == N+1) {  // Top-right corner
        x[IX(N+1,N+1)] = 0.5f * (x[IX(N,N+1)] + x[IX(N+1,N)]);
    }
}

// Helper functions
void lin_solve(FluidCube *cube, int b, float *x, float *x0, float a, float c) {
    float *d_x, *d_x0;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    cudaMalloc((void**)&d_x, size);
    cudaMalloc((void**)&d_x0, size);
    
    cudaMemcpy(d_x, x, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_x0, x0, size, cudaMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    // Perform multiple iterations for convergence
    for (int k = 0; k < 20; k++) {
        lin_solve_kernel<<<gridSize, blockSize>>>(cube->N, b, d_x, d_x0, a, c);
        cudaDeviceSynchronize();
        
        // Set boundary conditions
        dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                           (cube->N + 2 + blockSize.y - 1) / blockSize.y);
        set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, b, d_x);
        cudaDeviceSynchronize();
    }
    
    cudaMemcpy(x, d_x, size, cudaMemcpyDeviceToHost);
    
    cudaFree(d_x);
    cudaFree(d_x0);
}

void diffuse(FluidCube *cube, int b, float *x, float *x0, float diff, float dt) {
    float *d_x, *d_x0;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    cudaMalloc((void**)&d_x, size);
    cudaMalloc((void**)&d_x0, size);
    
    cudaMemcpy(d_x, x, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_x0, x0, size, cudaMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    diffuse_kernel<<<gridSize, blockSize>>>(cube->N, b, d_x, d_x0, diff, dt);
    cudaDeviceSynchronize();
    
    // Set boundary conditions
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, b, d_x);
    cudaDeviceSynchronize();
    
    cudaMemcpy(x, d_x, size, cudaMemcpyDeviceToHost);
    
    cudaFree(d_x);
    cudaFree(d_x0);
}

void advect(FluidCube *cube, int b, float *d, float *d0, float *u, float *v, float dt) {
    float *d_d, *d_d0, *d_u, *d_v;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    cudaMalloc((void**)&d_d, size);
    cudaMalloc((void**)&d_d0, size);
    cudaMalloc((void**)&d_u, size);
    cudaMalloc((void**)&d_v, size);
    
    cudaMemcpy(d_d, d, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_d0, d0, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_u, u, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_v, v, size, cudaMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    advect_kernel<<<gridSize, blockSize>>>(cube->N, b, d_d, d_d0, d_u, d_v, dt);
    cudaDeviceSynchronize();
    
    // Set boundary conditions
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, b, d_d);
    cudaDeviceSynchronize();
    
    cudaMemcpy(d, d_d, size, cudaMemcpyDeviceToHost);
    
    cudaFree(d_d);
    cudaFree(d_d0);
    cudaFree(d_u);
    cudaFree(d_v);
}

void project(FluidCube *cube, float *u, float *v, float *p, float *div) {
    float *d_u, *d_v, *d_p, *d_div;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    cudaMalloc((void**)&d_u, size);
    cudaMalloc((void**)&d_v, size);
    cudaMalloc((void**)&d_p, size);
    cudaMalloc((void**)&d_div, size);
    
    cudaMemcpy(d_u, u, size, cudaMemcpyHostToDevice);
    cudaMemcpy(d_v, v, size, cudaMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    // Step 1: Compute divergence
    project_kernel1<<<gridSize, blockSize>>>(cube->N, d_u, d_v, d_p, d_div);
    cudaDeviceSynchronize();
    
    // Set boundary conditions for div and p
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, 0, d_div);
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, 0, d_p);
    cudaDeviceSynchronize();
    
    // Step 2: Solve pressure Poisson equation
    for (int k = 0; k < 20; k++) {
        lin_solve_kernel<<<gridSize, blockSize>>>(cube->N, 0, d_p, d_div, 1, 4);
        cudaDeviceSynchronize();
        
        set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, 0, d_p);
        cudaDeviceSynchronize();
    }
    
    // Step 3: Subtract pressure gradient
    project_kernel2<<<gridSize, blockSize>>>(cube->N, d_u, d_v, d_p);
    cudaDeviceSynchronize();
    
    // Set boundary conditions for velocities
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, 1, d_u);
    set_bnd_kernel<<<boundGridSize, blockSize>>>(cube->N, 2, d_v);
    cudaDeviceSynchronize();
    
    cudaMemcpy(u, d_u, size, cudaMemcpyDeviceToHost);
    cudaMemcpy(v, d_v, size, cudaMemcpyDeviceToHost);
    
    cudaFree(d_u);
    cudaFree(d_v);
    cudaFree(d_p);
    cudaFree(d_div);
}

void fluid_step(FluidCube *cube) {
    int N = cube->N;
    float dt = cube->dt;
    float diff = cube->diff;
    float visc = cube->visc;
    float *u = cube->u;
    float *v = cube->v;
    float *u_prev = cube->u_prev;
    float *v_prev = cube->v_prev;
    float *dens = cube->dens;
    float *dens_prev = cube->dens_prev;
    
    // Temporary arrays for projection
    float *p = (float*)malloc((N+2)*(N+2)*sizeof(float));
    float *div = (float*)malloc((N+2)*(N+2)*sizeof(float));
    
    // Velocity step
    SWAP(u_prev, u);
    SWAP(v_prev, v);
    
    diffuse(cube, 1, u, u_prev, visc, dt);
    diffuse(cube, 2, v, v_prev, visc, dt);
    
    project(cube, u, v, p, div);
    
    SWAP(u_prev, u);
    SWAP(v_prev, v);
    
    advect(cube, 1, u, u_prev, u_prev, v_prev, dt);
    advect(cube, 2, v, v_prev, u_prev, v_prev, dt);
    
    project(cube, u, v, p, div);
    
    // Density step
    SWAP(dens_prev, dens);
    
    diffuse(cube, 0, dens, dens_prev, diff, dt);
    
    SWAP(dens_prev, dens);
    
    advect(cube, 0, dens, dens_prev, u, v, dt);
    
    free(p);
    free(div);
}

FluidCube *fluid_cube_create(int N, float dt, float diff, float visc) {
    FluidCube *cube = (FluidCube*)malloc(sizeof(FluidCube));
    
    int size = (N+2)*(N+2);
    
    cube->N = N;
    cube->dt = dt;
    cube->diff = diff;
    cube->visc = visc;
    
    cube->u = (float*)calloc(size, sizeof(float));
    cube->v = (float*)calloc(size, sizeof(float));
    cube->u_prev = (float*)calloc(size, sizeof(float));
    cube->v_prev = (float*)calloc(size, sizeof(float));
    cube->dens = (float*)calloc(size, sizeof(float));
    cube->dens_prev = (float*)calloc(size, sizeof(float));
    
    return cube;
}

void fluid_cube_destroy(FluidCube *cube) {
    free(cube->u);
    free(cube->v);
    free(cube->u_prev);
    free(cube->v_prev);
    free(cube->dens);
    free(cube->dens_prev);
    free(cube);
}

void add_source(float *x, float *s, int size, float dt) {
    for (int i = 0; i < size; i++) {
        x[i] += dt * s[i];
    }
}

// Example usage in main function
int main() {
    int N = 128;  // Grid size
    float dt = 0.1f;  // Time step
    float diff = 0.0f;  // Diffusion rate
    float visc = 0.0f;  // Viscosity
    
    FluidCube *cube = fluid_cube_create(N, dt, diff, visc);
    
    // Add an initial density source in the center
    for (int i = N/4; i <= 3*N/4; i++) {
        for (int j = N/4; j <= 3*N/4; j++) {
            cube->dens[IX(i,j)] = 1.0f;
        }
    }
    
    // Add an initial velocity field
    for (int i = 1; i <= N; i++) {
        for (int j = 1; j <= N; j++) {
            cube->u[IX(i,j)] = 0.0f;
            cube->v[IX(i,j)] = 0.1f;  // Flow upward
        }
    }
    
    // Simulate for a few steps
    printf("Starting simulation...\n");
    for (int step = 0; step < 10; step++) {
        printf("Step %d\n", step);
        fluid_step(cube);
    }
    
    // Clean up
    fluid_cube_destroy(cube);
    printf("Simulation complete.\n");
    
    return 0;
}
	.file	"tmpxft_00047efe_00000000-6_32.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB1990:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE1990:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z17fluid_cube_createifff
	.type	_Z17fluid_cube_createifff, @function
_Z17fluid_cube_createifff:
.LFB1984:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	movl	$72, %edi
	leal	2(%rbx), %ebp
	imull	%ebp, %ebp
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movslq	%ebp, %rbp
	movss	%xmm2, 4(%rsp)
	call	malloc@PLT
	movss	12(%rsp), %xmm0
	movq	%rbp, %rdi
	movl	$4, %esi
	movss	8(%rsp), %xmm1
	movss	4(%rsp), %xmm2
	movl	%ebx, 64(%rax)
	movq	%rax, %r12
	movss	%xmm0, (%rax)
	movss	%xmm1, 4(%rax)
	movss	%xmm2, 8(%rax)
	call	calloc@PLT
	movq	%rbp, %rdi
	movl	$4, %esi
	movq	%rax, 16(%r12)
	call	calloc@PLT
	movq	%rbp, %rdi
	movl	$4, %esi
	movq	%rax, 24(%r12)
	call	calloc@PLT
	movq	%rbp, %rdi
	movl	$4, %esi
	movq	%rax, 32(%r12)
	call	calloc@PLT
	movq	%rbp, %rdi
	movl	$4, %esi
	movq	%rax, 40(%r12)
	call	calloc@PLT
	movq	%rbp, %rdi
	movl	$4, %esi
	movq	%rax, 48(%r12)
	call	calloc@PLT
	movq	%rax, 56(%r12)
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1984:
	.size	_Z17fluid_cube_createifff, .-_Z17fluid_cube_createifff
	.globl	_Z18fluid_cube_destroyP9FluidCube
	.type	_Z18fluid_cube_destroyP9FluidCube, @function
_Z18fluid_cube_destroyP9FluidCube:
.LFB1985:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	movq	16(%rdi), %rdi
	call	free@PLT
	movq	24(%rbp), %rdi
	call	free@PLT
	movq	32(%rbp), %rdi
	call	free@PLT
	movq	40(%rbp), %rdi
	call	free@PLT
	movq	48(%rbp), %rdi
	call	free@PLT
	movq	56(%rbp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE1985:
	.size	_Z18fluid_cube_destroyP9FluidCube, .-_Z18fluid_cube_destroyP9FluidCube
	.globl	_Z10add_sourcePfS_if
	.type	_Z10add_sourcePfS_if, @function
_Z10add_sourcePfS_if:
.LFB1986:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L7:
	cmpl	%eax, %edx
	jle	.L10
	movss	(%rsi,%rax,4), %xmm1
	mulss	%xmm0, %xmm1
	addss	(%rdi,%rax,4), %xmm1
	movss	%xmm1, (%rdi,%rax,4)
	incq	%rax
	jmp	.L7
.L10:
	ret
	.cfi_endproc
.LFE1986:
	.size	_Z10add_sourcePfS_if, .-_Z10add_sourcePfS_if
	.globl	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff
	.type	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff, @function
_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff:
.LFB2012:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z16lin_solve_kerneliiPfS_ff(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L11:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2012:
	.size	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff, .-_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff
	.globl	_Z16lin_solve_kerneliiPfS_ff
	.type	_Z16lin_solve_kerneliiPfS_ff, @function
_Z16lin_solve_kerneliiPfS_ff:
.LFB2013:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff
	.cfi_endproc
.LFE2013:
	.size	_Z16lin_solve_kerneliiPfS_ff, .-_Z16lin_solve_kerneliiPfS_ff
	.globl	_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff
	.type	_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff, @function
_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff:
.LFB2014:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14diffuse_kerneliiPfS_ff(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L16:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2014:
	.size	_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff, .-_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff
	.globl	_Z14diffuse_kerneliiPfS_ff
	.type	_Z14diffuse_kerneliiPfS_ff, @function
_Z14diffuse_kerneliiPfS_ff:
.LFB2015:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff
	.cfi_endproc
.LFE2015:
	.size	_Z14diffuse_kerneliiPfS_ff, .-_Z14diffuse_kerneliiPfS_ff
	.globl	_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f
	.type	_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f, @function
_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f:
.LFB2016:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13advect_kerneliiPfS_S_S_f(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L21:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2016:
	.size	_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f, .-_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f
	.globl	_Z13advect_kerneliiPfS_S_S_f
	.type	_Z13advect_kerneliiPfS_S_S_f, @function
_Z13advect_kerneliiPfS_S_S_f:
.LFB2017:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f
	.cfi_endproc
.LFE2017:
	.size	_Z13advect_kerneliiPfS_S_S_f, .-_Z13advect_kerneliiPfS_S_S_f
	.globl	_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_
	.type	_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_, @function
_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_:
.LFB2018:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z15project_kernel1iPfS_S_S_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L26:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2018:
	.size	_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_, .-_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_
	.globl	_Z15project_kernel1iPfS_S_S_
	.type	_Z15project_kernel1iPfS_S_S_, @function
_Z15project_kernel1iPfS_S_S_:
.LFB2019:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_
	.cfi_endproc
.LFE2019:
	.size	_Z15project_kernel1iPfS_S_S_, .-_Z15project_kernel1iPfS_S_S_
	.globl	_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_
	.type	_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_, @function
_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_:
.LFB2020:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15project_kernel2iPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L31:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2020:
	.size	_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_, .-_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_
	.globl	_Z15project_kernel2iPfS_S_
	.type	_Z15project_kernel2iPfS_S_, @function
_Z15project_kernel2iPfS_S_:
.LFB2021:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_
	.cfi_endproc
.LFE2021:
	.size	_Z15project_kernel2iPfS_S_, .-_Z15project_kernel2iPfS_S_
	.globl	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
	.type	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf, @function
_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf:
.LFB2022:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14set_bnd_kerneliiPf(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2022:
	.size	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf, .-_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
	.globl	_Z14set_bnd_kerneliiPf
	.type	_Z14set_bnd_kerneliiPf, @function
_Z14set_bnd_kerneliiPf:
.LFB2023:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
	.cfi_endproc
.LFE2023:
	.size	_Z14set_bnd_kerneliiPf, .-_Z14set_bnd_kerneliiPf
	.globl	_Z9lin_solveP9FluidCubeiPfS1_ff
	.type	_Z9lin_solveP9FluidCubeiPfS1_ff, @function
_Z9lin_solveP9FluidCubeiPfS1_ff:
.LFB1979:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$68719476752, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movl	64(%rdi), %eax
	leaq	16(%rsp), %rdi
	leal	2(%rax), %r12d
	imull	%r12d, %r12d
	sall	$2, %r12d
	movslq	%r12d, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$20, %r14d
	call	cudaMemcpy@PLT
	movl	64(%rbx), %eax
	movl	$1, 44(%rsp)
	movl	$1, 56(%rsp)
	addl	$15, %eax
	shrl	$4, %eax
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
.L44:
	movl	44(%rsp), %ecx
	movq	48(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	56(%rsp), %esi
	movq	%r15, %rdx
	movq	%r15, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movl	64(%rbx), %edi
	movss	12(%rsp), %xmm1
	movl	%r13d, %esi
	movss	8(%rsp), %xmm0
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	call	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff
.L42:
	call	cudaDeviceSynchronize@PLT
	movl	64(%rbx), %eax
	movl	44(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	xorl	%r8d, %r8d
	movl	$1, %esi
	addl	$17, %eax
	shrl	$4, %eax
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	movq	60(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movl	64(%rbx), %edi
	movq	16(%rsp), %rdx
	movl	%r13d, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L43:
	call	cudaDeviceSynchronize@PLT
	decl	%r14d
	jne	.L44
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1979:
	.size	_Z9lin_solveP9FluidCubeiPfS1_ff, .-_Z9lin_solveP9FluidCubeiPfS1_ff
	.globl	_Z7diffuseP9FluidCubeiPfS1_ff
	.type	_Z7diffuseP9FluidCubeiPfS1_ff, @function
_Z7diffuseP9FluidCubeiPfS1_ff:
.LFB1980:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movl	64(%rdi), %eax
	leaq	16(%rsp), %rdi
	leal	2(%rax), %r12d
	imull	%r12d, %r12d
	sall	$2, %r12d
	movslq	%r12d, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	64(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 44(%rsp)
	addl	$15, %eax
	movq	%rdx, 36(%rsp)
	shrl	$4, %eax
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movss	8(%rsp), %xmm1
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L49
	movl	64(%rbx), %edi
	movq	24(%rsp), %rcx
	movl	%r13d, %esi
	movq	16(%rsp), %rdx
	call	_Z40__device_stub__Z14diffuse_kerneliiPfS_ffiiPfS_ff
.L49:
	call	cudaDeviceSynchronize@PLT
	movl	64(%rbx), %eax
	movl	44(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	xorl	%r8d, %r8d
	movl	$1, %esi
	addl	$17, %eax
	shrl	$4, %eax
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	movq	60(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	movl	64(%rbx), %edi
	movq	16(%rsp), %rdx
	movl	%r13d, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L50:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rsi
	movq	%r12, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1980:
	.size	_Z7diffuseP9FluidCubeiPfS1_ff, .-_Z7diffuseP9FluidCubeiPfS1_ff
	.globl	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	.type	_Z6advectP9FluidCubeiPfS1_S1_S1_f, @function
_Z6advectP9FluidCubeiPfS1_S1_S1_f:
.LFB1981:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%r9, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movl	64(%rdi), %eax
	leaq	16(%rsp), %rdi
	leal	2(%rax), %r12d
	imull	%r12d, %r12d
	sall	$2, %r12d
	movslq	%r12d, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	64(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 60(%rsp)
	addl	$15, %eax
	movq	%rdx, 52(%rsp)
	shrl	$4, %eax
	movl	%eax, 64(%rsp)
	movl	%eax, 68(%rsp)
	movq	64(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movss	4(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L54
	movl	64(%rbx), %edi
	movq	40(%rsp), %r9
	movl	%r13d, %esi
	movq	32(%rsp), %r8
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	call	_Z42__device_stub__Z13advect_kerneliiPfS_S_S_fiiPfS_S_S_f
.L54:
	call	cudaDeviceSynchronize@PLT
	movl	64(%rbx), %eax
	movl	60(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	52(%rsp), %rdx
	xorl	%r8d, %r8d
	movl	$1, %esi
	addl	$17, %eax
	shrl	$4, %eax
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movl	64(%rbx), %edi
	movq	16(%rsp), %rdx
	movl	%r13d, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L55:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rsi
	movq	%r12, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1981:
	.size	_Z6advectP9FluidCubeiPfS1_S1_S1_f, .-_Z6advectP9FluidCubeiPfS1_S1_S1_f
	.globl	_Z7projectP9FluidCubePfS1_S1_S1_
	.type	_Z7projectP9FluidCubePfS1_S1_S1_, @function
_Z7projectP9FluidCubePfS1_S1_S1_:
.LFB1982:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movl	64(%rdi), %eax
	movq	%rsp, %rdi
	leal	2(%rax), %r12d
	imull	%r12d, %r12d
	sall	$2, %r12d
	movslq	%r12d, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	64(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 56(%rsp)
	addl	$15, %eax
	movq	%rdx, 36(%rsp)
	shrl	$4, %eax
	movl	$1, 44(%rsp)
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movl	64(%rbx), %edi
	movq	24(%rsp), %r8
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	call	_Z42__device_stub__Z15project_kernel1iPfS_S_S_iPfS_S_S_
.L59:
	call	cudaDeviceSynchronize@PLT
	movl	64(%rbx), %eax
	movl	44(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	xorl	%r8d, %r8d
	movl	$1, %esi
	movl	$1, 68(%rsp)
	addl	$17, %eax
	shrl	$4, %eax
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
	movq	60(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movl	64(%rbx), %edi
	movq	24(%rsp), %rdx
	xorl	%esi, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L60:
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movl	64(%rbx), %edi
	movq	16(%rsp), %rdx
	xorl	%esi, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L61:
	call	cudaDeviceSynchronize@PLT
	movl	$20, %r14d
	movabsq	$68719476752, %r15
.L64:
	movl	44(%rsp), %ecx
	movq	48(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	56(%rsp), %esi
	movq	%r15, %rdx
	movq	%r15, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movl	64(%rbx), %edi
	movss	.LC0(%rip), %xmm1
	xorl	%esi, %esi
	movss	.LC1(%rip), %xmm0
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	call	_Z42__device_stub__Z16lin_solve_kerneliiPfS_ffiiPfS_ff
.L62:
	call	cudaDeviceSynchronize@PLT
	movl	44(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movl	64(%rbx), %edi
	movq	16(%rsp), %rdx
	xorl	%esi, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L63:
	call	cudaDeviceSynchronize@PLT
	decl	%r14d
	jne	.L64
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movl	64(%rbx), %edi
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	call	_Z40__device_stub__Z15project_kernel2iPfS_S_iPfS_S_
.L65:
	call	cudaDeviceSynchronize@PLT
	movl	44(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	36(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movl	64(%rbx), %edi
	movq	(%rsp), %rdx
	movl	$1, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L66:
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	movl	64(%rbx), %edi
	movq	8(%rsp), %rdx
	movl	$2, %esi
	call	_Z36__device_stub__Z14set_bnd_kerneliiPfiiPf
.L67:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rsi
	movq	%r12, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	%r12, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1982:
	.size	_Z7projectP9FluidCubePfS1_S1_S1_, .-_Z7projectP9FluidCubePfS1_S1_S1_
	.globl	_Z10fluid_stepP9FluidCube
	.type	_Z10fluid_stepP9FluidCube, @function
_Z10fluid_stepP9FluidCube:
.LFB1983:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	48(%rdi), %rax
	movss	4(%rdi), %xmm2
	movss	(%rdi), %xmm1
	movss	8(%rdi), %xmm0
	movq	32(%rdi), %rbx
	movq	40(%rdi), %r12
	movq	%rax, 16(%rsp)
	movq	56(%rdi), %rax
	movq	16(%rdi), %r13
	movss	%xmm2, 44(%rsp)
	movq	24(%rdi), %r14
	movss	%xmm1, 36(%rsp)
	movq	%rax, 24(%rsp)
	movl	64(%rdi), %eax
	movss	%xmm0, 40(%rsp)
	leal	2(%rax), %ebp
	imull	%ebp, %ebp
	movslq	%ebp, %rbp
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%r13, %rcx
	movq	%rbx, %rdx
	movq	%r15, %rdi
	movss	36(%rsp), %xmm1
	movss	40(%rsp), %xmm0
	movl	$1, %esi
	movq	%rax, %rbp
	call	_Z7diffuseP9FluidCubeiPfS1_ff
	movq	%r14, %rcx
	movq	%r12, %rdx
	movq	%r15, %rdi
	movss	36(%rsp), %xmm1
	movss	40(%rsp), %xmm0
	movl	$2, %esi
	call	_Z7diffuseP9FluidCubeiPfS1_ff
	movq	8(%rsp), %rcx
	movq	%rbp, %r8
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%r15, %rdi
	call	_Z7projectP9FluidCubePfS1_S1_S1_
	movq	%r12, %r9
	movq	%rbx, %r8
	movq	%rbx, %rcx
	movss	36(%rsp), %xmm1
	movq	%r13, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movaps	%xmm1, %xmm0
	call	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	movq	%r12, %r9
	movq	%rbx, %r8
	movq	%r12, %rcx
	movss	36(%rsp), %xmm1
	movq	%r14, %rdx
	movq	%r15, %rdi
	movl	$2, %esi
	movaps	%xmm1, %xmm0
	call	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	movq	8(%rsp), %rcx
	movq	%rbp, %r8
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r15, %rdi
	call	_Z7projectP9FluidCubePfS1_S1_S1_
	movss	44(%rsp), %xmm2
	movq	%r15, %rdi
	xorl	%esi, %esi
	movss	36(%rsp), %xmm1
	movq	16(%rsp), %rcx
	movq	24(%rsp), %rdx
	movaps	%xmm2, %xmm0
	call	_Z7diffuseP9FluidCubeiPfS1_ff
	movss	36(%rsp), %xmm1
	movq	%r14, %r9
	xorl	%esi, %esi
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	%r13, %r8
	movq	%r15, %rdi
	movaps	%xmm1, %xmm0
	call	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	movq	8(%rsp), %rdi
	call	free@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE1983:
	.size	_Z10fluid_stepP9FluidCube, .-_Z10fluid_stepP9FluidCube
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Starting simulation...\n"
.LC5:
	.string	"Step %d\n"
.LC6:
	.string	"Simulation complete.\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB1987:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movss	.LC3(%rip), %xmm0
	xorps	%xmm2, %xmm2
	movl	$128, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movaps	%xmm2, %xmm1
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	_Z17fluid_cube_createifff
	movss	.LC1(%rip), %xmm0
	movl	$32, %esi
	movq	%rax, %rbp
	movq	48(%rax), %rax
	subq	$-128, %rax
.L74:
	movq	%rax, %rcx
	movl	$65, %edx
.L75:
	movss	%xmm0, 16640(%rcx)
	addq	$520, %rcx
	decl	%edx
	jne	.L75
	incl	%esi
	addq	$4, %rax
	cmpl	$97, %esi
	jne	.L74
	movq	16(%rbp), %rdi
	movq	24(%rbp), %r8
	movl	$4, %ecx
	movl	$1, %esi
.L76:
	movq	%rcx, %rax
	movl	$128, %edx
.L77:
	movl	$0x00000000, 520(%rdi,%rax)
	movl	$0x3dcccccd, 520(%r8,%rax)
	addq	$520, %rax
	decl	%edx
	jne	.L77
	incl	%esi
	addq	$4, %rcx
	cmpl	$129, %esi
	jne	.L76
	leaq	.LC4(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %r12
.L79:
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incl	%ebx
	movq	%rbp, %rdi
	call	_Z10fluid_stepP9FluidCube
	cmpl	$10, %ebx
	jne	.L79
	movq	%rbp, %rdi
	call	_Z18fluid_cube_destroyP9FluidCube
	leaq	.LC6(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1987:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z14set_bnd_kerneliiPf"
.LC8:
	.string	"_Z15project_kernel2iPfS_S_"
.LC9:
	.string	"_Z15project_kernel1iPfS_S_S_"
.LC10:
	.string	"_Z13advect_kerneliiPfS_S_S_f"
.LC11:
	.string	"_Z14diffuse_kerneliiPfS_ff"
.LC12:
	.string	"_Z16lin_solve_kerneliiPfS_ff"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2025:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbp
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14set_bnd_kerneliiPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15project_kernel2iPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15project_kernel1iPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13advect_kerneliiPfS_S_S_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14diffuse_kerneliiPfS_ff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16lin_solve_kerneliiPfS_ff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2025:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1082130432
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC3:
	.long	1036831949
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <math.h>

// Grid dimensions
#define IX(i,j) ((i)+(N+2)*(j))
#define SWAP(x0,x) {float *tmp=x0;x0=x;x=tmp;}

typedef struct {
    float dt;          // time step
    float diff;        // diffusion rate
    float visc;        // viscosity
    float *u, *v;      // velocity field
    float *u_prev, *v_prev;
    float *dens, *dens_prev;  // density field
    int N;             // grid size
} FluidCube;

// HIP Kernel for linear solving step (Gauss-Seidel relaxation)
__global__ void lin_solve_kernel(int N, int b, float* x, float* x0, float a, float c) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x + 1;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y + 1;
    
    if (i <= N && j <= N) {
        x[IX(i,j)] = (x0[IX(i,j)] + a * (x[IX(i-1,j)] + x[IX(i+1,j)] + 
                                          x[IX(i,j-1)] + x[IX(i,j+1)])) / c;
    }
}

// HIP Kernel for diffusion step
__global__ void diffuse_kernel(int N, int b, float* x, float* x0, float diff, float dt) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x + 1;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y + 1;
    
    if (i <= N && j <= N) {
        float a = dt * diff * N * N;
        x[IX(i,j)] = (x0[IX(i,j)] + a * (x0[IX(i-1,j)] + x0[IX(i+1,j)] + 
                                          x0[IX(i,j-1)] + x0[IX(i,j+1)])) / (1 + 4 * a);
    }
}

// HIP Kernel for advection step
__global__ void advect_kernel(int N, int b, float* d, float* d0, float* u, float* v, float dt) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x + 1;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y + 1;
    
    if (i <= N && j <= N) {
        float x = i - dt * N * u[IX(i,j)];
        float y = j - dt * N * v[IX(i,j)];
        
        if (x < 0.5f) x = 0.5f; if (x > N + 0.5f) x = N + 0.5f;
        if (y < 0.5f) y = 0.5f; if (y > N + 0.5f) y = N + 0.5f;
        
        int i0 = (int)x;
        int i1 = i0 + 1;
        int j0 = (int)y;
        int j1 = j0 + 1;
        
        float s1 = x - i0;
        float s0 = 1 - s1;
        float t1 = y - j0;
        float t0 = 1 - t1;
        
        d[IX(i,j)] = s0 * (t0 * d0[IX(i0,j0)] + t1 * d0[IX(i0,j1)]) +
                     s1 * (t0 * d0[IX(i1,j0)] + t1 * d0[IX(i1,j1)]);
    }
}

// HIP Kernel for projection step - compute divergence
__global__ void project_kernel1(int N, float* u, float* v, float* p, float* div) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x + 1;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y + 1;
    
    if (i <= N && j <= N) {
        div[IX(i,j)] = -0.5f * (u[IX(i+1,j)] - u[IX(i-1,j)] + 
                              v[IX(i,j+1)] - v[IX(i,j-1)]) / N;
        p[IX(i,j)] = 0;
    }
}

// HIP Kernel for projection step - subtract gradient
__global__ void project_kernel2(int N, float* u, float* v, float* p) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x + 1;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y + 1;
    
    if (i <= N && j <= N) {
        u[IX(i,j)] -= 0.5f * N * (p[IX(i+1,j)] - p[IX(i-1,j)]);
        v[IX(i,j)] -= 0.5f * N * (p[IX(i,j+1)] - p[IX(i,j-1)]);
    }
}

// HIP Kernel for setting boundary conditions
__global__ void set_bnd_kernel(int N, int b, float* x) {
    int i = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x;
    int j = hipBlockIdx_y * hipBlockDim_y + hipThreadIdx_y;
    
    // Handle boundaries
    if (i == 0 && j <= N+1) {  // Left boundary
        x[IX(0,j)] = b == 1 ? -x[IX(1,j)] : x[IX(1,j)];
    }
    if (i == N+1 && j <= N+1) {  // Right boundary
        x[IX(N+1,j)] = b == 1 ? -x[IX(N,j)] : x[IX(N,j)];
    }
    if (j == 0 && i <= N+1) {  // Bottom boundary
        x[IX(i,0)] = b == 2 ? -x[IX(i,1)] : x[IX(i,1)];
    }
    if (j == N+1 && i <= N+1) {  // Top boundary
        x[IX(i,N+1)] = b == 2 ? -x[IX(i,N)] : x[IX(i,N)];
    }
    
    // Handle corners
    if (i == 0 && j == 0) {  // Bottom-left corner
        x[IX(0,0)] = 0.5f * (x[IX(1,0)] + x[IX(0,1)]);
    }
    if (i == 0 && j == N+1) {  // Top-left corner
        x[IX(0,N+1)] = 0.5f * (x[IX(1,N+1)] + x[IX(0,N)]);
    }
    if (i == N+1 && j == 0) {  // Bottom-right corner
        x[IX(N+1,0)] = 0.5f * (x[IX(N,0)] + x[IX(N+1,1)]);
    }
    if (i == N+1 && j == N+1) {  // Top-right corner
        x[IX(N+1,N+1)] = 0.5f * (x[IX(N,N+1)] + x[IX(N+1,N)]);
    }
}

// Helper functions
void lin_solve(FluidCube *cube, int b, float *x, float *x0, float a, float c) {
    float *d_x, *d_x0;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    hipMalloc((void**)&d_x, size);
    hipMalloc((void**)&d_x0, size);
    
    hipMemcpy(d_x, x, size, hipMemcpyHostToDevice);
    hipMemcpy(d_x0, x0, size, hipMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    // Perform multiple iterations for convergence
    for (int k = 0; k < 20; k++) {
        hipLaunchKernelGGL(lin_solve_kernel, gridSize, blockSize, 0, 0, 
                          cube->N, b, d_x, d_x0, a, c);
        hipDeviceSynchronize();
        
        // Set boundary conditions
        dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                           (cube->N + 2 + blockSize.y - 1) / blockSize.y);
        hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0, 
                          cube->N, b, d_x);
        hipDeviceSynchronize();
    }
    
    hipMemcpy(x, d_x, size, hipMemcpyDeviceToHost);
    
    hipFree(d_x);
    hipFree(d_x0);
}

void diffuse(FluidCube *cube, int b, float *x, float *x0, float diff, float dt) {
    float *d_x, *d_x0;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    hipMalloc((void**)&d_x, size);
    hipMalloc((void**)&d_x0, size);
    
    hipMemcpy(d_x, x, size, hipMemcpyHostToDevice);
    hipMemcpy(d_x0, x0, size, hipMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    hipLaunchKernelGGL(diffuse_kernel, gridSize, blockSize, 0, 0,
                      cube->N, b, d_x, d_x0, diff, dt);
    hipDeviceSynchronize();
    
    // Set boundary conditions
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, b, d_x);
    hipDeviceSynchronize();
    
    hipMemcpy(x, d_x, size, hipMemcpyDeviceToHost);
    
    hipFree(d_x);
    hipFree(d_x0);
}

void advect(FluidCube *cube, int b, float *d, float *d0, float *u, float *v, float dt) {
    float *d_d, *d_d0, *d_u, *d_v;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    hipMalloc((void**)&d_d, size);
    hipMalloc((void**)&d_d0, size);
    hipMalloc((void**)&d_u, size);
    hipMalloc((void**)&d_v, size);
    
    hipMemcpy(d_d, d, size, hipMemcpyHostToDevice);
    hipMemcpy(d_d0, d0, size, hipMemcpyHostToDevice);
    hipMemcpy(d_u, u, size, hipMemcpyHostToDevice);
    hipMemcpy(d_v, v, size, hipMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    hipLaunchKernelGGL(advect_kernel, gridSize, blockSize, 0, 0,
                      cube->N, b, d_d, d_d0, d_u, d_v, dt);
    hipDeviceSynchronize();
    
    // Set boundary conditions
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, b, d_d);
    hipDeviceSynchronize();
    
    hipMemcpy(d, d_d, size, hipMemcpyDeviceToHost);
    
    hipFree(d_d);
    hipFree(d_d0);
    hipFree(d_u);
    hipFree(d_v);
}

void project(FluidCube *cube, float *u, float *v, float *p, float *div) {
    float *d_u, *d_v, *d_p, *d_div;
    int size = (cube->N + 2) * (cube->N + 2) * sizeof(float);
    
    hipMalloc((void**)&d_u, size);
    hipMalloc((void**)&d_v, size);
    hipMalloc((void**)&d_p, size);
    hipMalloc((void**)&d_div, size);
    
    hipMemcpy(d_u, u, size, hipMemcpyHostToDevice);
    hipMemcpy(d_v, v, size, hipMemcpyHostToDevice);
    
    dim3 blockSize(16, 16);
    dim3 gridSize((cube->N + blockSize.x - 1) / blockSize.x, 
                  (cube->N + blockSize.y - 1) / blockSize.y);
    
    // Step 1: Compute divergence
    hipLaunchKernelGGL(project_kernel1, gridSize, blockSize, 0, 0,
                      cube->N, d_u, d_v, d_p, d_div);
    hipDeviceSynchronize();
    
    // Set boundary conditions for div and p
    dim3 boundGridSize((cube->N + 2 + blockSize.x - 1) / blockSize.x, 
                       (cube->N + 2 + blockSize.y - 1) / blockSize.y);
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, 0, d_div);
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, 0, d_p);
    hipDeviceSynchronize();
    
    // Step 2: Solve pressure Poisson equation
    for (int k = 0; k < 20; k++) {
        hipLaunchKernelGGL(lin_solve_kernel, gridSize, blockSize, 0, 0,
                          cube->N, 0, d_p, d_div, 1, 4);
        hipDeviceSynchronize();
        
        hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                          cube->N, 0, d_p);
        hipDeviceSynchronize();
    }
    
    // Step 3: Subtract pressure gradient
    hipLaunchKernelGGL(project_kernel2, gridSize, blockSize, 0, 0,
                      cube->N, d_u, d_v, d_p);
    hipDeviceSynchronize();
    
    // Set boundary conditions for velocities
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, 1, d_u);
    hipLaunchKernelGGL(set_bnd_kernel, boundGridSize, blockSize, 0, 0,
                      cube->N, 2, d_v);
    hipDeviceSynchronize();
    
    hipMemcpy(u, d_u, size, hipMemcpyDeviceToHost);
    hipMemcpy(v, d_v, size, hipMemcpyDeviceToHost);
    
    hipFree(d_u);
    hipFree(d_v);
    hipFree(d_p);
    hipFree(d_div);
}

void fluid_step(FluidCube *cube) {
    int N = cube->N;
    float dt = cube->dt;
    float diff = cube->diff;
    float visc = cube->visc;
    float *u = cube->u;
    float *v = cube->v;
    float *u_prev = cube->u_prev;
    float *v_prev = cube->v_prev;
    float *dens = cube->dens;
    float *dens_prev = cube->dens_prev;
    
    // Temporary arrays for projection
    float *p = (float*)malloc((N+2)*(N+2)*sizeof(float));
    float *div = (float*)malloc((N+2)*(N+2)*sizeof(float));
    
    // Velocity step
    SWAP(u_prev, u);
    SWAP(v_prev, v);
    
    diffuse(cube, 1, u, u_prev, visc, dt);
    diffuse(cube, 2, v, v_prev, visc, dt);
    
    project(cube, u, v, p, div);
    
    SWAP(u_prev, u);
    SWAP(v_prev, v);
    
    advect(cube, 1, u, u_prev, u_prev, v_prev, dt);
    advect(cube, 2, v, v_prev, u_prev, v_prev, dt);
    
    project(cube, u, v, p, div);
    
    // Density step
    SWAP(dens_prev, dens);
    
    diffuse(cube, 0, dens, dens_prev, diff, dt);
    
    SWAP(dens_prev, dens);
    
    advect(cube, 0, dens, dens_prev, u, v, dt);
    
    free(p);
    free(div);
}

FluidCube *fluid_cube_create(int N, float dt, float diff, float visc) {
    FluidCube *cube = (FluidCube*)malloc(sizeof(FluidCube));
    
    int size = (N+2)*(N+2);
    
    cube->N = N;
    cube->dt = dt;
    cube->diff = diff;
    cube->visc = visc;
    
    cube->u = (float*)calloc(size, sizeof(float));
    cube->v = (float*)calloc(size, sizeof(float));
    cube->u_prev = (float*)calloc(size, sizeof(float));
    cube->v_prev = (float*)calloc(size, sizeof(float));
    cube->dens = (float*)calloc(size, sizeof(float));
    cube->dens_prev = (float*)calloc(size, sizeof(float));
    
    return cube;
}

void fluid_cube_destroy(FluidCube *cube) {
    free(cube->u);
    free(cube->v);
    free(cube->u_prev);
    free(cube->v_prev);
    free(cube->dens);
    free(cube->dens_prev);
    free(cube);
}

void add_source(float *x, float *s, int size, float dt) {
    for (int i = 0; i < size; i++) {
        x[i] += dt * s[i];
    }
}

// Example usage in main function
int main() {
    // Initialize HIP runtime
    hipFree(0);
    
    int N = 128;  // Grid size
    float dt = 0.1f;  // Time step
    float diff = 0.0f;  // Diffusion rate
    float visc = 0.0f;  // Viscosity
    
    FluidCube *cube = fluid_cube_create(N, dt, diff, visc);
    
    // Add an initial density source in the center
    for (int i = N/4; i <= 3*N/4; i++) {
        for (int j = N/4; j <= 3*N/4; j++) {
            cube->dens[IX(i,j)] = 1.0f;
        }
    }
    
    // Add an initial velocity field
    for (int i = 1; i <= N; i++) {
        for (int j = 1; j <= N; j++) {
            cube->u[IX(i,j)] = 0.0f;
            cube->v[IX(i,j)] = 0.1f;  // Flow upward
        }
    }
    
    // Simulate for a few steps
    printf("Starting simulation...\n");
    for (int step = 0; step < 10; step++) {
        printf("Step %d\n", step);
        fluid_step(cube);
    }
    
    // Clean up
    fluid_cube_destroy(cube);
    printf("Simulation complete.\n");
    
    return 0;
}
	.text
	.file	"32.cpp"
	.globl	_Z31__device_stub__lin_solve_kerneliiPfS_ff # -- Begin function _Z31__device_stub__lin_solve_kerneliiPfS_ff
	.p2align	4, 0x90
	.type	_Z31__device_stub__lin_solve_kerneliiPfS_ff,@function
_Z31__device_stub__lin_solve_kerneliiPfS_ff: # @_Z31__device_stub__lin_solve_kerneliiPfS_ff
	.cfi_startproc
# %bb.0:
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	movl	%esi, 8(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rcx, 64(%rsp)
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z16lin_solve_kerneliiPfS_ff, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$152, %rsp
	.cfi_adjust_cfa_offset -152
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__lin_solve_kerneliiPfS_ff, .Lfunc_end0-_Z31__device_stub__lin_solve_kerneliiPfS_ff
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__diffuse_kerneliiPfS_ff # -- Begin function _Z29__device_stub__diffuse_kerneliiPfS_ff
	.p2align	4, 0x90
	.type	_Z29__device_stub__diffuse_kerneliiPfS_ff,@function
_Z29__device_stub__diffuse_kerneliiPfS_ff: # @_Z29__device_stub__diffuse_kerneliiPfS_ff
	.cfi_startproc
# %bb.0:
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	movl	%esi, 8(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rcx, 64(%rsp)
	movss	%xmm0, 4(%rsp)
	movss	%xmm1, (%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z14diffuse_kerneliiPfS_ff, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$152, %rsp
	.cfi_adjust_cfa_offset -152
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__diffuse_kerneliiPfS_ff, .Lfunc_end1-_Z29__device_stub__diffuse_kerneliiPfS_ff
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__advect_kerneliiPfS_S_S_f # -- Begin function _Z28__device_stub__advect_kerneliiPfS_S_S_f
	.p2align	4, 0x90
	.type	_Z28__device_stub__advect_kerneliiPfS_S_S_f,@function
_Z28__device_stub__advect_kerneliiPfS_S_S_f: # @_Z28__device_stub__advect_kerneliiPfS_S_S_f
	.cfi_startproc
# %bb.0:
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	movl	%esi, 8(%rsp)
	movq	%rdx, 88(%rsp)
	movq	%rcx, 80(%rsp)
	movq	%r8, 72(%rsp)
	movq	%r9, 64(%rsp)
	movss	%xmm0, 4(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z13advect_kerneliiPfS_S_S_f, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$168, %rsp
	.cfi_adjust_cfa_offset -168
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__advect_kerneliiPfS_S_S_f, .Lfunc_end2-_Z28__device_stub__advect_kerneliiPfS_S_S_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__project_kernel1iPfS_S_S_ # -- Begin function _Z30__device_stub__project_kernel1iPfS_S_S_
	.p2align	4, 0x90
	.type	_Z30__device_stub__project_kernel1iPfS_S_S_,@function
_Z30__device_stub__project_kernel1iPfS_S_S_: # @_Z30__device_stub__project_kernel1iPfS_S_S_
	.cfi_startproc
# %bb.0:
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	movq	%rsi, 88(%rsp)
	movq	%rdx, 80(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%r8, 64(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z15project_kernel1iPfS_S_S_, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$152, %rsp
	.cfi_adjust_cfa_offset -152
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__project_kernel1iPfS_S_S_, .Lfunc_end3-_Z30__device_stub__project_kernel1iPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__project_kernel2iPfS_S_ # -- Begin function _Z30__device_stub__project_kernel2iPfS_S_
	.p2align	4, 0x90
	.type	_Z30__device_stub__project_kernel2iPfS_S_,@function
_Z30__device_stub__project_kernel2iPfS_S_: # @_Z30__device_stub__project_kernel2iPfS_S_
	.cfi_startproc
# %bb.0:
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 4(%rsp)
	movq	%rsi, 72(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rcx, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z15project_kernel2iPfS_S_, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$136, %rsp
	.cfi_adjust_cfa_offset -136
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__project_kernel2iPfS_S_, .Lfunc_end4-_Z30__device_stub__project_kernel2iPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__set_bnd_kerneliiPf # -- Begin function _Z29__device_stub__set_bnd_kerneliiPf
	.p2align	4, 0x90
	.type	_Z29__device_stub__set_bnd_kerneliiPf,@function
_Z29__device_stub__set_bnd_kerneliiPf:  # @_Z29__device_stub__set_bnd_kerneliiPf
	.cfi_startproc
# %bb.0:
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movl	%edi, 4(%rsp)
	movl	%esi, (%rsp)
	movq	%rdx, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	%rsp, %rax
	movq	%rax, 72(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	leaq	64(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$104, %rsp
	.cfi_adjust_cfa_offset -104
	retq
.Lfunc_end5:
	.size	_Z29__device_stub__set_bnd_kerneliiPf, .Lfunc_end5-_Z29__device_stub__set_bnd_kerneliiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z9lin_solveP9FluidCubeiPfS1_ff # -- Begin function _Z9lin_solveP9FluidCubeiPfS1_ff
	.p2align	4, 0x90
	.type	_Z9lin_solveP9FluidCubeiPfS1_ff,@function
_Z9lin_solveP9FluidCubeiPfS1_ff:        # @_Z9lin_solveP9FluidCubeiPfS1_ff
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm1, 96(%rsp)                 # 4-byte Spill
	movss	%xmm0, 92(%rsp)                 # 4-byte Spill
	movq	%rcx, %rbx
	movq	%rdx, %r12
	movl	%esi, %ebp
	movq	%rdi, %r14
	movabsq	$68719476752, %r15              # imm = 0x1000000010
	movl	64(%rdi), %eax
	addl	$2, %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r13
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	%r12, 120(%rsp)                 # 8-byte Spill
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r13, 112(%rsp)                 # 8-byte Spill
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	64(%r14), %eax
	addl	$15, %eax
	shrl	$4, %eax
	movq	%rax, %r13
	shlq	$32, %r13
	orq	%rax, %r13
	movl	$20, %ebx
	leaq	128(%rsp), %r12
	jmp	.LBB6_1
	.p2align	4, 0x90
.LBB6_5:                                #   in Loop: Header=BB6_1 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebx
	je	.LBB6_6
.LBB6_1:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_3
# %bb.2:                                #   in Loop: Header=BB6_1 Depth=1
	movl	64(%r14), %eax
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	%eax, 4(%rsp)
	movl	%ebp, 108(%rsp)
	movq	%rcx, 80(%rsp)
	movq	%rdx, 40(%rsp)
	movss	92(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 104(%rsp)
	movss	96(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 100(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	108(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	100(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	64(%rsp), %rdi
	leaq	48(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	movq	48(%rsp), %rcx
	movl	56(%rsp), %r8d
	movl	$_Z16lin_solve_kerneliiPfS_ff, %edi
	movq	%r12, %r9
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB6_3:                                #   in Loop: Header=BB6_1 Depth=1
	callq	hipDeviceSynchronize
	movl	64(%r14), %edi
	addl	$17, %edi
	shrl	$4, %edi
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.4:                                #   in Loop: Header=BB6_1 Depth=1
	movl	64(%r14), %eax
	movq	8(%rsp), %rcx
	movl	%eax, 24(%rsp)
	movl	%ebp, 4(%rsp)
	movq	%rcx, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rdi
	leaq	48(%rsp), %rsi
	leaq	40(%rsp), %rdx
	leaq	32(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	movq	48(%rsp), %rcx
	movl	56(%rsp), %r8d
	movl	$_Z14set_bnd_kerneliiPf, %edi
	movq	%r12, %r9
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	jmp	.LBB6_5
.LBB6_6:
	movq	8(%rsp), %rsi
	movq	120(%rsp), %rdi                 # 8-byte Reload
	movq	112(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z9lin_solveP9FluidCubeiPfS1_ff, .Lfunc_end6-_Z9lin_solveP9FluidCubeiPfS1_ff
	.cfi_endproc
                                        # -- End function
	.globl	_Z7diffuseP9FluidCubeiPfS1_ff   # -- Begin function _Z7diffuseP9FluidCubeiPfS1_ff
	.p2align	4, 0x90
	.type	_Z7diffuseP9FluidCubeiPfS1_ff,@function
_Z7diffuseP9FluidCubeiPfS1_ff:          # @_Z7diffuseP9FluidCubeiPfS1_ff
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm1, 96(%rsp)                 # 4-byte Spill
	movss	%xmm0, 92(%rsp)                 # 4-byte Spill
	movq	%rcx, %r13
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movq	%rdi, %r15
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	movl	64(%rdi), %eax
	addl	$2, %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	64(%r15), %eax
	addl	$15, %eax
	shrl	$4, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movl	64(%r15), %eax
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	%eax, 4(%rsp)
	movl	%ebp, 108(%rsp)
	movq	%rcx, 80(%rsp)
	movq	%rdx, 40(%rsp)
	movss	92(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 104(%rsp)
	movss	96(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 100(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	108(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	100(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rdi
	leaq	48(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	movq	48(%rsp), %rcx
	movl	56(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14diffuse_kerneliiPfS_ff, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_2:
	callq	hipDeviceSynchronize
	movl	64(%r15), %edi
	addl	$17, %edi
	shrl	$4, %edi
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:
	movl	64(%r15), %eax
	movq	8(%rsp), %rcx
	movl	%eax, 24(%rsp)
	movl	%ebp, 4(%rsp)
	movq	%rcx, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	64(%rsp), %rdi
	leaq	48(%rsp), %rsi
	leaq	40(%rsp), %rdx
	leaq	32(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	movq	48(%rsp), %rcx
	movl	56(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB7_4:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z7diffuseP9FluidCubeiPfS1_ff, .Lfunc_end7-_Z7diffuseP9FluidCubeiPfS1_ff
	.cfi_endproc
                                        # -- End function
	.globl	_Z6advectP9FluidCubeiPfS1_S1_S1_f # -- Begin function _Z6advectP9FluidCubeiPfS1_S1_S1_f
	.p2align	4, 0x90
	.type	_Z6advectP9FluidCubeiPfS1_S1_S1_f,@function
_Z6advectP9FluidCubeiPfS1_S1_S1_f:      # @_Z6advectP9FluidCubeiPfS1_S1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 112(%rsp)                # 4-byte Spill
	movq	%r9, %r13
	movq	%r8, %r12
	movq	%rcx, %rbp
	movq	%rdx, %rbx
	movl	%esi, 12(%rsp)                  # 4-byte Spill
	movq	%rdi, %r15
	movl	64(%rdi), %eax
	addl	$2, %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rsp), %rdi
	movq	%rbx, 128(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	64(%r15), %eax
	addl	$15, %eax
	shrl	$4, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_2
# %bb.1:
	movl	64(%r15), %eax
	movq	(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%eax, 124(%rsp)
	movl	12(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 120(%rsp)
	movq	%rcx, 104(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rsi, 56(%rsp)
	movq	%rdi, 48(%rsp)
	movss	112(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 116(%rsp)
	leaq	124(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	116(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	88(%rsp), %rdi
	leaq	72(%rsp), %rsi
	leaq	40(%rsp), %rdx
	leaq	136(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	movq	72(%rsp), %rcx
	movl	80(%rsp), %r8d
	leaq	144(%rsp), %r9
	movl	$_Z13advect_kerneliiPfS_S_S_f, %edi
	pushq	136(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB8_2:
	callq	hipDeviceSynchronize
	movl	64(%r15), %edi
	addl	$17, %edi
	shrl	$4, %edi
	movabsq	$4294967297, %rax               # imm = 0x100000001
	imulq	%rax, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_4
# %bb.3:
	movl	64(%r15), %eax
	movq	(%rsp), %rcx
	movl	%eax, 48(%rsp)
	movl	12(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 40(%rsp)
	movq	%rcx, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	88(%rsp), %rdi
	leaq	72(%rsp), %rsi
	leaq	64(%rsp), %rdx
	leaq	56(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	movq	72(%rsp), %rcx
	movl	80(%rsp), %r8d
	leaq	144(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB8_4:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	128(%rsp), %rdi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z6advectP9FluidCubeiPfS1_S1_S1_f, .Lfunc_end8-_Z6advectP9FluidCubeiPfS1_S1_S1_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z7projectP9FluidCubePfS1_S1_S1_ # -- Begin function _Z7projectP9FluidCubePfS1_S1_S1_
	.p2align	4, 0x90
	.type	_Z7projectP9FluidCubePfS1_S1_S1_,@function
_Z7projectP9FluidCubePfS1_S1_S1_:       # @_Z7projectP9FluidCubePfS1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r15
	movq	%rdi, %r13
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movl	64(%rdi), %eax
	addl	$2, %eax
	imull	%eax, %eax
	shll	$2, %eax
	movslq	%eax, %r12
	leaq	104(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	96(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	176(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	104(%rsp), %rdi
	movq	%r15, 200(%rsp)                 # 8-byte Spill
	movq	%r15, %rsi
	movq	%rbp, %r15
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rdi
	movq	%rbx, 208(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r12, 192(%rsp)                 # 8-byte Spill
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	64(%r13), %eax
	addl	$15, %eax
	shrl	$4, %eax
	movq	%rax, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movl	64(%r13), %eax
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	176(%rsp), %rdi
	movl	%eax, 84(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rsi, 24(%rsp)
	movq	%rdi, 16(%rsp)
	leaq	84(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	8(%rsp), %rdx
	leaq	168(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z15project_kernel1iPfS_S_S_, %edi
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_2:
	callq	hipDeviceSynchronize
	movl	64(%r13), %ebp
	addl	$17, %ebp
	shrl	$4, %ebp
	imulq	%r14, %rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_4
# %bb.3:
	movl	64(%r13), %eax
	movq	176(%rsp), %rcx
	movl	%eax, 16(%rsp)
	movl	$0, 8(%rsp)
	movq	%rcx, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_4:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_6
# %bb.5:
	movl	64(%r13), %eax
	movq	88(%rsp), %rcx
	movl	%eax, 16(%rsp)
	movl	$0, 8(%rsp)
	movq	%rcx, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_6:
	callq	hipDeviceSynchronize
	movl	$20, %r14d
	leaq	112(%rsp), %r15
	movabsq	$68719476752, %r12              # imm = 0x1000000010
	jmp	.LBB9_7
	.p2align	4, 0x90
.LBB9_11:                               #   in Loop: Header=BB9_7 Depth=1
	callq	hipDeviceSynchronize
	decl	%r14d
	je	.LBB9_12
.LBB9_7:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_9
# %bb.8:                                #   in Loop: Header=BB9_7 Depth=1
	movl	64(%r13), %eax
	movq	88(%rsp), %rcx
	movq	176(%rsp), %rdx
	movl	%eax, 8(%rsp)
	movl	$0, 168(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdx, 32(%rsp)
	movl	$1065353216, 84(%rsp)           # imm = 0x3F800000
	movl	$1082130432, 188(%rsp)          # imm = 0x40800000
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	84(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	188(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	movl	$_Z16lin_solve_kerneliiPfS_ff, %edi
	movq	%r15, %r9
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_9:                                #   in Loop: Header=BB9_7 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_11
# %bb.10:                               #   in Loop: Header=BB9_7 Depth=1
	movl	64(%r13), %eax
	movq	88(%rsp), %rcx
	movl	%eax, 16(%rsp)
	movl	$0, 8(%rsp)
	movq	%rcx, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	movl	$_Z14set_bnd_kerneliiPf, %edi
	movq	%r15, %r9
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	jmp	.LBB9_11
.LBB9_12:
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rbx              # imm = 0x1000000010
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_14
# %bb.13:
	movl	64(%r13), %eax
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	%eax, 168(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rsi, 24(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z15project_kernel2iPfS_S_, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_14:
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_16
# %bb.15:
	movl	64(%r13), %eax
	movq	104(%rsp), %rcx
	movl	%eax, 16(%rsp)
	movl	$1, 8(%rsp)
	movq	%rcx, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_16:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_18
# %bb.17:
	movl	64(%r13), %eax
	movq	96(%rsp), %rcx
	movl	%eax, 16(%rsp)
	movl	$2, 8(%rsp)
	movq	%rcx, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	32(%rsp), %rdx
	leaq	24(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	movq	40(%rsp), %rcx
	movl	48(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14set_bnd_kerneliiPf, %edi
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB9_18:
	callq	hipDeviceSynchronize
	movq	104(%rsp), %rsi
	movq	200(%rsp), %rdi                 # 8-byte Reload
	movq	192(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rsi
	movq	208(%rsp), %rdi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	176(%rsp), %rdi
	callq	hipFree
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z7projectP9FluidCubePfS1_S1_S1_, .Lfunc_end9-_Z7projectP9FluidCubePfS1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10fluid_stepP9FluidCube       # -- Begin function _Z10fluid_stepP9FluidCube
	.p2align	4, 0x90
	.type	_Z10fluid_stepP9FluidCube,@function
_Z10fluid_stepP9FluidCube:              # @_Z10fluid_stepP9FluidCube
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movss	(%rdi), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movss	4(%rdi), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movss	8(%rdi), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movq	16(%rdi), %r14
	movq	24(%rdi), %r15
	movq	32(%rdi), %rbp
	movq	40(%rdi), %r12
	movq	48(%rdi), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	56(%rdi), %r13
	movl	$1, %esi
	movq	%rbp, %rdx
	movq	%r14, %rcx
	callq	_Z7diffuseP9FluidCubeiPfS1_ff
	movq	%rbx, %rdi
	movl	$2, %esi
	movq	%r12, %rdx
	movq	%r15, %rcx
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z7diffuseP9FluidCubeiPfS1_ff
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	callq	_Z7projectP9FluidCubePfS1_S1_S1_
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movq	%rbp, %rcx
	movq	%rbp, %r8
	movq	%r12, %r9
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	movq	%rbx, %rdi
	movl	$2, %esi
	movq	%r15, %rdx
	movq	%r12, %rcx
	movq	%rbp, %r8
	movq	%r12, %r9
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z6advectP9FluidCubeiPfS1_S1_S1_f
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z7projectP9FluidCubePfS1_S1_S1_
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	16(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rcx
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	callq	_Z7diffuseP9FluidCubeiPfS1_ff
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	movq	%r13, %rcx
	movq	%r14, %r8
	movq	%r15, %r9
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z6advectP9FluidCubeiPfS1_S1_S1_f # TAILCALL
.Lfunc_end10:
	.size	_Z10fluid_stepP9FluidCube, .Lfunc_end10-_Z10fluid_stepP9FluidCube
	.cfi_endproc
                                        # -- End function
	.globl	_Z17fluid_cube_createifff       # -- Begin function _Z17fluid_cube_createifff
	.p2align	4, 0x90
	.type	_Z17fluid_cube_createifff,@function
_Z17fluid_cube_createifff:              # @_Z17fluid_cube_createifff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movss	%xmm2, 12(%rsp)                 # 4-byte Spill
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%edi, %r15d
	movl	$72, %edi
	callq	malloc
	movq	%rax, %rbx
	leal	2(%r15), %r14d
	imull	%r14d, %r14d
	movl	%r15d, 64(%rax)
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rax)
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%rax)
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%rax)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 16(%rbx)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 24(%rbx)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 32(%rbx)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 40(%rbx)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 48(%rbx)
	movl	$4, %esi
	movq	%r14, %rdi
	callq	calloc
	movq	%rax, 56(%rbx)
	movq	%rbx, %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z17fluid_cube_createifff, .Lfunc_end11-_Z17fluid_cube_createifff
	.cfi_endproc
                                        # -- End function
	.globl	_Z18fluid_cube_destroyP9FluidCube # -- Begin function _Z18fluid_cube_destroyP9FluidCube
	.p2align	4, 0x90
	.type	_Z18fluid_cube_destroyP9FluidCube,@function
_Z18fluid_cube_destroyP9FluidCube:      # @_Z18fluid_cube_destroyP9FluidCube
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	16(%rdi), %rdi
	callq	free
	movq	24(%rbx), %rdi
	callq	free
	movq	32(%rbx), %rdi
	callq	free
	movq	40(%rbx), %rdi
	callq	free
	movq	48(%rbx), %rdi
	callq	free
	movq	56(%rbx), %rdi
	callq	free
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end12:
	.size	_Z18fluid_cube_destroyP9FluidCube, .Lfunc_end12-_Z18fluid_cube_destroyP9FluidCube
	.cfi_endproc
                                        # -- End function
	.globl	_Z10add_sourcePfS_if            # -- Begin function _Z10add_sourcePfS_if
	.p2align	4, 0x90
	.type	_Z10add_sourcePfS_if,@function
_Z10add_sourcePfS_if:                   # @_Z10add_sourcePfS_if
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB13_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
	.p2align	4, 0x90
.LBB13_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	addss	(%rdi,%rcx,4), %xmm1
	movss	%xmm1, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB13_2
.LBB13_3:                               # %._crit_edge
	retq
.Lfunc_end13:
	.size	_Z10add_sourcePfS_if, .Lfunc_end13-_Z10add_sourcePfS_if
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	hipFree
	movl	$72, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$128, 64(%rax)
	movq	$1036831949, (%rax)             # imm = 0x3DCCCCCD
	movl	$0, 8(%rax)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r14
	movq	%rax, 16(%rbx)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r15
	movq	%rax, 24(%rbx)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rax, 32(%rbx)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rax, 40(%rbx)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, %rbp
	movq	%rax, 48(%rbx)
	movl	$16900, %edi                    # imm = 0x4204
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r12
	movq	%rax, 56(%rbx)
	movq	%rbp, %rax
	addq	$16768, %rax                    # imm = 0x4180
	movl	$32, %ecx
	.p2align	4, 0x90
.LBB14_1:                               # %.preheader41
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB14_2 Depth 2
	xorl	%edx, %edx
	.p2align	4, 0x90
.LBB14_2:                               #   Parent Loop BB14_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%rax,%rdx)        # imm = 0x3F800000
	addq	$520, %rdx                      # imm = 0x208
	cmpq	$33800, %rdx                    # imm = 0x8408
	jne	.LBB14_2
# %bb.3:                                #   in Loop: Header=BB14_1 Depth=1
	incq	%rcx
	addq	$4, %rax
	cmpq	$97, %rcx
	jne	.LBB14_1
# %bb.4:                                # %.preheader.preheader
	movq	%r15, %rax
	addq	$524, %rax                      # imm = 0x20C
	movq	%r14, %rcx
	addq	$524, %rcx                      # imm = 0x20C
	movl	$1, %edx
	.p2align	4, 0x90
.LBB14_5:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB14_6 Depth 2
	xorl	%esi, %esi
	.p2align	4, 0x90
.LBB14_6:                               #   Parent Loop BB14_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$0, (%rcx,%rsi)
	movl	$1036831949, (%rax,%rsi)        # imm = 0x3DCCCCCD
	addq	$520, %rsi                      # imm = 0x208
	cmpq	$66560, %rsi                    # imm = 0x10400
	jne	.LBB14_6
# %bb.7:                                #   in Loop: Header=BB14_5 Depth=1
	incq	%rdx
	addq	$4, %rax
	addq	$4, %rcx
	cmpq	$129, %rdx
	jne	.LBB14_5
# %bb.8:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r13d, %r13d
	.p2align	4, 0x90
.LBB14_9:                               # =>This Inner Loop Header: Depth=1
	movl	$.L.str.1, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z10fluid_stepP9FluidCube
	incl	%r13d
	cmpl	$10, %r13d
	jne	.LBB14_9
# %bb.10:
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	8(%rsp), %rdi                   # 8-byte Reload
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	main, .Lfunc_end14-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	movq	__hip_gpubin_handle(%rip), %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16lin_solve_kerneliiPfS_ff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14diffuse_kerneliiPfS_ff, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13advect_kerneliiPfS_S_S_f, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15project_kernel1iPfS_S_S_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15project_kernel2iPfS_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14set_bnd_kerneliiPf, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16lin_solve_kerneliiPfS_ff,@object # @_Z16lin_solve_kerneliiPfS_ff
	.section	.rodata,"a",@progbits
	.globl	_Z16lin_solve_kerneliiPfS_ff
	.p2align	3, 0x0
_Z16lin_solve_kerneliiPfS_ff:
	.quad	_Z31__device_stub__lin_solve_kerneliiPfS_ff
	.size	_Z16lin_solve_kerneliiPfS_ff, 8

	.type	_Z14diffuse_kerneliiPfS_ff,@object # @_Z14diffuse_kerneliiPfS_ff
	.globl	_Z14diffuse_kerneliiPfS_ff
	.p2align	3, 0x0
_Z14diffuse_kerneliiPfS_ff:
	.quad	_Z29__device_stub__diffuse_kerneliiPfS_ff
	.size	_Z14diffuse_kerneliiPfS_ff, 8

	.type	_Z13advect_kerneliiPfS_S_S_f,@object # @_Z13advect_kerneliiPfS_S_S_f
	.globl	_Z13advect_kerneliiPfS_S_S_f
	.p2align	3, 0x0
_Z13advect_kerneliiPfS_S_S_f:
	.quad	_Z28__device_stub__advect_kerneliiPfS_S_S_f
	.size	_Z13advect_kerneliiPfS_S_S_f, 8

	.type	_Z15project_kernel1iPfS_S_S_,@object # @_Z15project_kernel1iPfS_S_S_
	.globl	_Z15project_kernel1iPfS_S_S_
	.p2align	3, 0x0
_Z15project_kernel1iPfS_S_S_:
	.quad	_Z30__device_stub__project_kernel1iPfS_S_S_
	.size	_Z15project_kernel1iPfS_S_S_, 8

	.type	_Z15project_kernel2iPfS_S_,@object # @_Z15project_kernel2iPfS_S_
	.globl	_Z15project_kernel2iPfS_S_
	.p2align	3, 0x0
_Z15project_kernel2iPfS_S_:
	.quad	_Z30__device_stub__project_kernel2iPfS_S_
	.size	_Z15project_kernel2iPfS_S_, 8

	.type	_Z14set_bnd_kerneliiPf,@object  # @_Z14set_bnd_kerneliiPf
	.globl	_Z14set_bnd_kerneliiPf
	.p2align	3, 0x0
_Z14set_bnd_kerneliiPf:
	.quad	_Z29__device_stub__set_bnd_kerneliiPf
	.size	_Z14set_bnd_kerneliiPf, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Step %d\n"
	.size	.L.str.1, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16lin_solve_kerneliiPfS_ff"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14diffuse_kerneliiPfS_ff"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13advect_kerneliiPfS_S_S_f"
	.size	.L__unnamed_3, 29

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15project_kernel1iPfS_S_S_"
	.size	.L__unnamed_4, 29

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15project_kernel2iPfS_S_"
	.size	.L__unnamed_5, 27

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z14set_bnd_kerneliiPf"
	.size	.L__unnamed_6, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Starting simulation..."
	.size	.Lstr, 23

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Simulation complete."
	.size	.Lstr.1, 21

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__lin_solve_kerneliiPfS_ff
	.addrsig_sym _Z29__device_stub__diffuse_kerneliiPfS_ff
	.addrsig_sym _Z28__device_stub__advect_kerneliiPfS_S_S_f
	.addrsig_sym _Z30__device_stub__project_kernel1iPfS_S_S_
	.addrsig_sym _Z30__device_stub__project_kernel2iPfS_S_
	.addrsig_sym _Z29__device_stub__set_bnd_kerneliiPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16lin_solve_kerneliiPfS_ff
	.addrsig_sym _Z14diffuse_kerneliiPfS_ff
	.addrsig_sym _Z13advect_kerneliiPfS_S_S_f
	.addrsig_sym _Z15project_kernel1iPfS_S_S_
	.addrsig_sym _Z15project_kernel2iPfS_S_
	.addrsig_sym _Z14set_bnd_kerneliiPf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16lin_solve_kerneliiPfS_ff ; -- Begin function _Z16lin_solve_kerneliiPfS_ff
	.globl	_Z16lin_solve_kerneliiPfS_ff
	.p2align	8
	.type	_Z16lin_solve_kerneliiPfS_ff,@function
_Z16lin_solve_kerneliiPfS_ff:           ; @_Z16lin_solve_kerneliiPfS_ff
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s3, 0xffff
	s_lshr_b32 s3, s3, 16
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 1, v0
	v_add_nc_u32_e32 v3, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v1, v3
	v_cmpx_ge_i32_e64 s2, v4
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_add_i32 s2, s2, 2
	s_load_b128 s[4:7], s[0:1], 0x8
	v_mul_lo_u32 v7, v3, s2
	s_load_b64 s[0:1], s[0:1], 0x18
	v_add_nc_u32_e32 v8, 2, v2
	v_mad_u64_u32 v[3:4], null, v2, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[5:6], null, v8, s2, v[1:2]
	v_add_nc_u32_e32 v0, v7, v0
	v_add_nc_u32_e32 v7, v7, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v9, 2, v0
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_lshlrev_b64 v[6:7], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[0:1], off
	global_load_b32 v8, v[8:9], off
	v_add_co_u32 v0, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v2, v10, v8
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, s0, v0
	v_div_scale_f32 v0, null, s1, s1, v1
	v_div_scale_f32 v4, vcc_lo, v1, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, -v0, v2, 1.0
	v_fmac_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v4, v2
	v_fma_f32 v5, -v0, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v5, v2
	v_fma_f32 v0, -v0, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v2, v3
	v_div_fixup_f32 v2, v0, s1, v1
	v_add_co_u32 v0, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16lin_solve_kerneliiPfS_ff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16lin_solve_kerneliiPfS_ff, .Lfunc_end0-_Z16lin_solve_kerneliiPfS_ff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 512
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14diffuse_kerneliiPfS_ff ; -- Begin function _Z14diffuse_kerneliiPfS_ff
	.globl	_Z14diffuse_kerneliiPfS_ff
	.p2align	8
	.type	_Z14diffuse_kerneliiPfS_ff,@function
_Z14diffuse_kerneliiPfS_ff:             ; @_Z14diffuse_kerneliiPfS_ff
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s3, 0xffff
	s_lshr_b32 s3, s3, 16
	v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 1, v0
	v_add_nc_u32_e32 v3, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v1, v3
	v_cmpx_ge_i32_e64 s2, v4
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_add_i32 s3, s2, 2
	v_add_nc_u32_e32 v8, 2, v2
	v_mul_lo_u32 v7, v3, s3
	s_load_b128 s[4:7], s[0:1], 0x8
	v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, v8, s3, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x18
	v_add_nc_u32_e32 v0, v7, v0
	v_add_nc_u32_e32 v7, v7, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v9, 2, v0
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[6:7], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[9:10]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[0:1], off
	global_load_b32 v8, v[8:9], off
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[2:3], off
	v_cvt_f32_i32_e32 v2, s2
	v_mul_f32_e64 v3, s0, s1
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v5, v10, v8
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v4, v5, v4 :: v_dual_mul_f32 v3, v3, v2
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v3, v2
	v_fma_f32 v3, v2, 4.0, 1.0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v2, v0
	v_div_scale_f32 v0, null, v3, v3, v1
	v_div_scale_f32 v5, vcc_lo, v1, v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v0, v2, 1.0
	v_fmac_f32_e32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v2
	v_fma_f32 v8, -v0, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v8, v2
	v_fma_f32 v0, -v0, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v2, v4
	v_div_fixup_f32 v2, v0, v3, v1
	v_add_co_u32 v0, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14diffuse_kerneliiPfS_ff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14diffuse_kerneliiPfS_ff, .Lfunc_end1-_Z14diffuse_kerneliiPfS_ff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13advect_kerneliiPfS_S_S_f ; -- Begin function _Z13advect_kerneliiPfS_S_S_f
	.globl	_Z13advect_kerneliiPfS_S_S_f
	.p2align	8
	.type	_Z13advect_kerneliiPfS_S_S_f,@function
_Z13advect_kerneliiPfS_S_S_f:           ; @_Z13advect_kerneliiPfS_S_S_f
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x3c
	s_load_b32 s2, s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s3, 0xffff
	s_lshr_b32 s3, s3, 16
	s_mul_i32 s14, s14, s4
	s_mul_i32 s15, s15, s3
	v_add3_u32 v0, v1, s14, 1
	v_add3_u32 v1, v2, s15, 1
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_ge_i32_e64 s2, v2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_add_i32 s3, s2, 2
	s_load_b256 s[4:11], s[0:1], 0x8
	v_mad_u64_u32 v[2:3], null, v1, s3, v[0:1]
	s_load_b32 s0, s[0:1], 0x28
	v_cvt_f32_i32_e32 v1, v1
	v_cvt_f32_i32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v6, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_cvt_f32_i32_e32 v5, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v7, s0, v5
	v_add_f32_e32 v5, 0.5, v5
	s_waitcnt vmcnt(1)
	v_fma_f32 v1, -v7, v6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, 0.5, v1
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, -v7, v4, v0
	v_cndmask_b32_e32 v1, 0.5, v1, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, v1, v5
	v_cndmask_b32_e32 v10, v1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e32 vcc_lo, 0.5, v0
	v_cvt_i32_f32_e32 v11, v10
	v_cndmask_b32_e32 v0, 0.5, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, s3, v11
	v_cmp_gt_f32_e32 vcc_lo, v0, v5
	v_cndmask_b32_e32 v12, v0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, s3, v1
	v_cvt_i32_f32_e32 v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v5, 1, v13
	v_add_nc_u32_e32 v0, v1, v13
	v_add_nc_u32_e32 v6, v7, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, v1, v5
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v8, v7, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v14, v[4:5], off
	v_add_co_u32 v4, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v7, vcc_lo
	s_clause 0x2
	global_load_b32 v0, v[0:1], off
	global_load_b32 v1, v[8:9], off
	global_load_b32 v4, v[4:5], off
	v_cvt_f32_i32_e32 v5, v11
	v_cvt_f32_i32_e32 v7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v7, v12, v7
	v_sub_f32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v6, 1.0, v5
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v8, v14, v6
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v0, v0, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v8, v1, v5 :: v_dual_sub_f32 v1, 1.0, v7
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v7, v8
	v_fmac_f32_e32 v4, v1, v0
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13advect_kerneliiPfS_S_S_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13advect_kerneliiPfS_S_S_f, .Lfunc_end2-_Z13advect_kerneliiPfS_S_S_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 600
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15project_kernel1iPfS_S_S_ ; -- Begin function _Z15project_kernel1iPfS_S_S_
	.globl	_Z15project_kernel1iPfS_S_S_
	.p2align	8
	.type	_Z15project_kernel1iPfS_S_S_,@function
_Z15project_kernel1iPfS_S_S_:           ; @_Z15project_kernel1iPfS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[1:2], null, s14, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_add_nc_u32_e32 v0, 1, v1
	s_mov_b32 s2, exec_lo
	v_add_nc_u32_e32 v3, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v0, v3
	v_cmpx_ge_i32_e64 s8, v4
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_add_i32 s9, s8, 2
	s_load_b256 s[0:7], s[0:1], 0x8
	v_mul_lo_u32 v9, v3, s9
	v_add_nc_u32_e32 v7, 2, v2
	v_mad_u64_u32 v[3:4], null, v2, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v9, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[5:6], null, v7, s9, v[0:1]
	v_add_nc_u32_e32 v7, 2, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_nc_u32_e32 v0, v9, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v8, v[1:2], off
	v_add_co_u32 v1, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[5:6], off
	global_load_b32 v1, v[1:2], off
	v_cvt_f32_i32_e32 v4, s8
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v2, v7, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, -0.5, v1
	v_div_scale_f32 v2, null, v4, v4, v5
	v_div_scale_f32 v6, vcc_lo, v5, v4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v1, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v3
	v_fma_f32 v1, -v2, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, v1, v3
	v_ashrrev_i32_e32 v1, 31, v0
	v_fma_f32 v2, -v2, v7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_mov_b32_e32 v6, 0
	v_div_fmas_f32 v7, v2, v3, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v4, v7, v4, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[2:3], v4, off
	global_store_b32 v[0:1], v6, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15project_kernel1iPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15project_kernel1iPfS_S_S_, .Lfunc_end3-_Z15project_kernel1iPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z15project_kernel2iPfS_S_ ; -- Begin function _Z15project_kernel2iPfS_S_
	.globl	_Z15project_kernel2iPfS_S_
	.p2align	8
	.type	_Z15project_kernel2iPfS_S_,@function
_Z15project_kernel2iPfS_S_:             ; @_Z15project_kernel2iPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_lshr_b32 s2, s2, 16
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s2, v[4:5]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, 1, v2
	v_add_nc_u32_e32 v3, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v4, v1, v3
	v_cmpx_ge_i32_e64 s4, v4
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_add_i32 s5, s4, 2
	s_load_b64 s[6:7], s[0:1], 0x18
	v_mul_lo_u32 v3, v3, s5
	v_cvt_f32_i32_e32 v13, s4
	s_load_b128 s[0:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v13, -0.5, v13 :: v_dual_add_nc_u32 v2, v3, v2
	v_add_nc_u32_e32 v4, v3, v1
	v_add_nc_u32_e32 v6, 2, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[6:7], off
	global_load_b32 v11, v[2:3], off
	global_load_b32 v12, v[8:9], off
	v_add_nc_u32_e32 v6, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v6, s5, v[1:2]
	v_mad_u64_u32 v[6:7], null, v0, s5, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v6, v10, v11
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v12, v13, v6
	global_store_b32 v[8:9], v12, off
	s_clause 0x1
	global_load_b32 v6, v[0:1], off
	global_load_b32 v2, v[2:3], off
	v_add_co_u32 v0, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v2, v6, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v3, v13, v2
	global_store_b32 v[0:1], v3, off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15project_kernel2iPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15project_kernel2iPfS_S_, .Lfunc_end4-_Z15project_kernel2iPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 472
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14set_bnd_kerneliiPf  ; -- Begin function _Z14set_bnd_kerneliiPf
	.globl	_Z14set_bnd_kerneliiPf
	.p2align	8
	.type	_Z14set_bnd_kerneliiPf,@function
_Z14set_bnd_kerneliiPf:                 ; @_Z14set_bnd_kerneliiPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b128 s[8:11], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_lshr_b32 s1, s2, 16
	v_mad_u64_u32 v[0:1], null, s14, s0, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s1, v[4:5]
	s_add_i32 s6, s8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e64 s1, 0, v0
	v_cmp_lt_i32_e64 s2, s6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s2
	s_xor_b32 s3, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB5_2
; %bb.1:
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s3, -1, 0
	s_add_i32 s4, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v2, s4
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_load_b32 v1, v[3:4], off offset:4
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v1, v1, -v1, s3
	global_store_b32 v[3:4], v1, off
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ne_u32_e32 vcc_lo, s6, v0
	v_cmp_eq_u32_e64 s0, s6, v0
	s_or_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, -1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_4
; %bb.3:
	s_cmp_eq_u32 s9, 1
	s_cselect_b32 s4, -1, 0
	s_add_i32 s2, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v2, s2
	v_add_nc_u32_e32 v3, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s10, v3
	v_add_co_ci_u32_e64 v4, s2, s11, v4, s2
	global_load_b32 v5, v[3:4], off
	v_add_nc_u32_e32 v3, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s10, v3
	v_add_co_ci_u32_e64 v4, s2, s11, v4, s2
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v1, v5, -v5, s4
	global_store_b32 v[3:4], v1, off
.LBB5_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_eq_u32_e64 s3, 0, v2
	v_cmp_ge_i32_e64 s2, s6, v0
	v_cmp_lt_i32_e64 s4, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB5_6
; %bb.5:
	v_add3_u32 v3, s8, 2, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_cmp_eq_u32 s9, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s10, v3
	v_add_co_ci_u32_e64 v4, s2, s11, v4, s2
	s_cselect_b32 s2, -1, 0
	global_load_b32 v5, v[3:4], off
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v1, v5, -v5, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s10, v3
	v_add_co_ci_u32_e64 v4, s2, s11, v4, s2
	global_store_b32 v[3:4], v1, off
.LBB5_6:
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_ne_u32_e64 s2, s6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s4, s4, s2
	s_xor_b32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB5_8
; %bb.7:
	s_cmp_eq_u32 s9, 2
	s_cselect_b32 s7, -1, 0
	s_add_i32 s9, s8, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s9, s8, v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s4, s10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v4, s4, s11, v4, s4
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, s9, s6, v[0:1]
	v_cndmask_b32_e64 v1, v1, -v1, s7
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s4, s10, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s4, s11, v4, s4
	global_store_b32 v[3:4], v1, off
.LBB5_8:
	s_or_b32 exec_lo, exec_lo, s5
	v_or_b32_e32 v0, v2, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB5_10
; %bb.9:
	s_ashr_i32 s9, s8, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[12:13], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s12, s10, s12
	s_addc_u32 s13, s11, s13
	s_clause 0x1
	global_load_b32 v1, v0, s[10:11] offset:4
	global_load_b32 v2, v0, s[12:13] offset:8
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, 0.5, v1
	global_store_b32 v0, v1, s[10:11]
.LBB5_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_or_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s1, -1
	s_and_saveexec_b32 s1, s4
	s_cbranch_execz .LBB5_12
; %bb.11:
	s_add_i32 s7, s8, 2
	v_mov_b32_e32 v0, 0
	s_mul_i32 s4, s7, s6
	s_mul_i32 s12, s7, s8
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	s_add_u32 s4, s10, s4
	s_addc_u32 s5, s11, s5
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 2
	s_add_u32 s12, s10, s12
	s_addc_u32 s13, s11, s13
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5] offset:4
	global_load_b32 v2, v0, s[12:13]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, 0.5, v1
	global_store_b32 v0, v1, s[4:5]
.LBB5_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_and_b32 s1, s0, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB5_14
; %bb.13:
	s_ashr_i32 s9, s8, 31
	s_add_i32 s1, s8, s6
	s_lshl_b64 s[4:5], s[8:9], 2
	v_mov_b32_e32 v0, 0
	s_add_u32 s4, s10, s4
	s_addc_u32 s5, s11, s5
	s_add_i32 s12, s1, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s13, s12, 31
	s_lshl_b64 s[12:13], s[12:13], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s12, s10, s12
	s_addc_u32 s13, s11, s13
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[12:13]
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[6:7], 2
	s_add_u32 s4, s10, s4
	s_addc_u32 s5, s11, s5
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, 0.5, v1
	global_store_b32 v0, v1, s[4:5]
.LBB5_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_or_b32 s0, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, -1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB5_16
; %bb.15:
	s_add_i32 s2, s8, 2
	v_mov_b32_e32 v0, 0
	s_mul_i32 s4, s2, s6
	s_mul_i32 s2, s2, s8
	s_add_i32 s0, s4, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_add_i32 s2, s2, s6
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_clause 0x1
	global_load_b32 v1, v0, s[0:1]
	global_load_b32 v2, v0, s[2:3]
	s_add_i32 s0, s4, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s1, s0, 31
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	v_mul_f32_e32 v1, 0.5, v1
	global_store_b32 v0, v1, s[0:1]
.LBB5_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14set_bnd_kerneliiPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z14set_bnd_kerneliiPf, .Lfunc_end5-_Z14set_bnd_kerneliiPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1216
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16lin_solve_kerneliiPfS_ff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16lin_solve_kerneliiPfS_ff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14diffuse_kerneliiPfS_ff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14diffuse_kerneliiPfS_ff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13advect_kerneliiPfS_S_S_f
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13advect_kerneliiPfS_S_S_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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...

	.end_amdgpu_metadata
