#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>

// CSR SpMV kernel
__global__ void spmv_csr_kernel(
    const int num_rows,
    const int *row_ptr,
    const int *col_idx,
    const float *values,
    const float *x,
    float *y)
{
    int row = blockIdx.x * blockDim.x + threadIdx.x;
    
    if (row < num_rows) {
        float dot = 0.0f;
        int row_start = row_ptr[row];
        int row_end = row_ptr[row + 1];
        
        // Compute dot product for this row
        for (int i = row_start; i < row_end; i++) {
            dot += values[i] * x[col_idx[i]];
        }
        
        y[row] = dot;
    }
}

// CPU implementation for verification
void spmv_csr_cpu(
    const int num_rows,
    const int *row_ptr,
    const int *col_idx,
    const float *values,
    const float *x,
    float *y)
{
    for (int row = 0; row < num_rows; row++) {
        float dot = 0.0f;
        int row_start = row_ptr[row];
        int row_end = row_ptr[row + 1];
        
        for (int i = row_start; i < row_end; i++) {
            dot += values[i] * x[col_idx[i]];
        }
        
        y[row] = dot;
    }
}

// Utility function to check results
bool verify_results(const float *a, const float *b, int size, float tolerance = 1e-5) {
    for (int i = 0; i < size; i++) {
        if (fabs(a[i] - b[i]) > tolerance) {
            printf("Mismatch at index %d: CPU = %f, GPU = %f\n", i, a[i], b[i]);
            return false;
        }
    }
    return true;
}

int main() {
    // Example CSR matrix
    int num_rows = 4;
    int num_cols = 4;
    int nnz = 8;  // Number of non-zero elements
    
    // CSR format arrays
    int h_row_ptr[5] = {0, 2, 4, 7, 8};  // size num_rows + 1
    int h_col_idx[8] = {0, 1, 1, 2, 0, 2, 3, 3};  // size nnz
    float h_values[8] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};  // size nnz
    
    // Input vector and result vectors
    float h_x[4] = {1.0, 2.0, 3.0, 4.0};  // size num_cols
    float h_y[4] = {0.0};  // size num_rows (GPU result)
    float h_y_cpu[4] = {0.0};  // size num_rows (CPU result for verification)
    
    // Allocate device memory
    int *d_row_ptr, *d_col_idx;
    float *d_values, *d_x, *d_y;
    
    cudaMalloc((void**)&d_row_ptr, (num_rows + 1) * sizeof(int));
    cudaMalloc((void**)&d_col_idx, nnz * sizeof(int));
    cudaMalloc((void**)&d_values, nnz * sizeof(float));
    cudaMalloc((void**)&d_x, num_cols * sizeof(float));
    cudaMalloc((void**)&d_y, num_rows * sizeof(float));
    
    // Copy data to device
    cudaMemcpy(d_row_ptr, h_row_ptr, (num_rows + 1) * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_col_idx, h_col_idx, nnz * sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_values, h_values, nnz * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_x, h_x, num_cols * sizeof(float), cudaMemcpyHostToDevice);
    
    // Set kernel launch parameters
    int block_size = 256;
    int grid_size = (num_rows + block_size - 1) / block_size;
    
    // Launch kernel
    spmv_csr_kernel<<<grid_size, block_size>>>(num_rows, d_row_ptr, d_col_idx, d_values, d_x, d_y);
    
    // Check for kernel launch errors
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        printf("Kernel launch error: %s\n", cudaGetErrorString(err));
        return -1;
    }
    
    // Copy result back to host
    cudaMemcpy(h_y, d_y, num_rows * sizeof(float), cudaMemcpyDeviceToHost);
    
    // Compute CPU result for verification
    spmv_csr_cpu(num_rows, h_row_ptr, h_col_idx, h_values, h_x, h_y_cpu);
    
    // Verify results
    printf("Result vector:\n");
    for (int i = 0; i < num_rows; i++) {
        printf("y[%d] = %f\n", i, h_y[i]);
    }
    
    if (verify_results(h_y, h_y_cpu, num_rows)) {
        printf("Verification successful!\n");
    } else {
        printf("Verification failed!\n");
    }
    
    // Free device memory
    cudaFree(d_row_ptr);
    cudaFree(d_col_idx);
    cudaFree(d_values);
    cudaFree(d_x);
    cudaFree(d_y);
    
    return 0;
}
	.file	"tmpxft_00047cdc_00000000-6_16.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB1984:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE1984:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	.type	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf, @function
_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf:
.LFB1979:
	.cfi_startproc
	endbr64
	movq	%rdx, %r10
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %edi
	jle	.L13
	movl	4(%rsi,%rax,4), %r11d
	movslq	(%rsi,%rax,4), %rdx
	xorps	%xmm0, %xmm0
	cmpl	%edx, %r11d
	jg	.L11
	movss	%xmm0, (%r9,%rax,4)
	incq	%rax
	jmp	.L8
.L13:
	ret
.L11:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L5:
	movslq	(%r10,%rdx,4), %rbx
	movss	(%r8,%rbx,4), %xmm1
	mulss	(%rcx,%rdx,4), %xmm1
	incq	%rdx
	addss	%xmm1, %xmm0
.L4:
	cmpl	%edx, %r11d
	jg	.L5
	movss	%xmm0, (%r9,%rax,4)
	incq	%rax
	cmpl	%eax, %edi
	jle	.L14
	movl	4(%rsi,%rax,4), %r11d
	movslq	(%rsi,%rax,4), %rdx
	xorps	%xmm0, %xmm0
	jmp	.L4
.L14:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1979:
	.size	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf, .-_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Mismatch at index %d: CPU = %f, GPU = %f\n"
	.text
	.globl	_Z14verify_resultsPKfS0_if
	.type	_Z14verify_resultsPKfS0_if, @function
_Z14verify_resultsPKfS0_if:
.LFB1980:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movss	.LC1(%rip), %xmm4
.L16:
	movl	%eax, %r8d
	cmpl	%eax, %edx
	jle	.L25
	movss	(%rdi,%rax,4), %xmm2
	movss	(%rsi,%rax,4), %xmm1
	incq	%rax
	movaps	%xmm2, %xmm3
	subss	%xmm1, %xmm3
	andps	%xmm4, %xmm3
	comiss	%xmm0, %xmm3
	jbe	.L16
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%r8d, %edx
	leaq	.LC2(%rip), %rsi
	movl	$1, %edi
	movb	$2, %al
	cvtss2sd	%xmm2, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L25:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE1980:
	.size	_Z14verify_resultsPKfS0_if, .-_Z14verify_resultsPKfS0_if
	.globl	_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf
	.type	_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf, @function
_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf:
.LFB2006:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L26:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2006:
	.size	_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf, .-_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf
	.globl	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.type	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, @function
_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf:
.LFB2007:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf
	.cfi_endproc
.LFE2007:
	.size	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, .-_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.section	.rodata.str1.1
.LC3:
	.string	"Kernel launch error: %s\n"
.LC4:
	.string	"Result vector:\n"
.LC5:
	.string	"y[%d] = %f\n"
.LC7:
	.string	"Verification successful!\n"
.LC8:
	.string	"Verification failed!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB1981:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorps	%xmm0, %xmm0
	movabsq	$30064771076, %rcx
	movabsq	$4611686019492741120, %rdx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$20, %esi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$1, %ebx
	salq	$32, %rbx
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	movabsq	$8589934592, %rax
	movq	%rcx, 124(%rsp)
	movq	%rsp, %rdi
	movabsq	$8589934593, %rcx
	movq	%rbx, 136(%rsp)
	leaq	116(%rsp), %rbp
	movabsq	$4665729215040061440, %rbx
	leaq	136(%rsp), %r12
	movq	%rcx, 144(%rsp)
	leaq	168(%rsp), %r13
	movabsq	$4683743613553737728, %rcx
	movups	%xmm0, 84(%rsp)
	movups	%xmm0, 100(%rsp)
	movq	%rdx, 168(%rsp)
	movq	%rax, 116(%rsp)
	movq	%rax, 152(%rsp)
	movabsq	$12884901891, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4647714816524288000, %rax
	movq	%rcx, 192(%rsp)
	movq	%rdx, 68(%rsp)
	movq	%rbx, 184(%rsp)
	leaq	68(%rsp), %rbx
	movl	$8, 132(%rsp)
	movq	%rax, 176(%rsp)
	movq	%rax, 76(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$20, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	32(%rsp), %r9
	movq	24(%rsp), %r8
	movl	$4, %edi
	movq	16(%rsp), %rcx
	movq	8(%rsp), %rdx
	movq	(%rsp), %rsi
	call	_Z48__device_stub__Z15spmv_csr_kerneliPKiS0_PKfS2_PfiPKiS0_PKfS2_Pf
.L32:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L33
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$1, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %eax
	jmp	.L31
.L33:
	movq	32(%rsp), %rsi
	leaq	84(%rsp), %r14
	movl	$2, %ecx
	movl	$16, %edx
	movq	%r14, %rdi
	leaq	100(%rsp), %r15
	call	cudaMemcpy@PLT
	movq	%rbx, %r8
	movq	%rbp, %rsi
	movq	%r15, %r9
	movq	%r13, %rcx
	movq	%r12, %rdx
	movl	$4, %edi
	xorl	%ebx, %ebx
	call	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$1, %edi
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rbp
.L35:
	movl	%ebx, %edx
	cvtss2sd	(%r14,%rbx,4), %xmm0
	movq	%rbp, %rsi
	movb	$1, %al
	movl	$1, %edi
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$4, %rbx
	jne	.L35
	movss	.LC6(%rip), %xmm0
	movq	%r15, %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	call	_Z14verify_resultsPKfS0_if
	leaq	.LC7(%rip), %rsi
	testb	%al, %al
	jne	.L41
	leaq	.LC8(%rip), %rsi
.L41:
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L31:
	movq	200(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1981:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2009:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	925353388
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

// CSR SpMV kernel
__global__ void spmv_csr_kernel(
    const int num_rows,
    const int *row_ptr,
    const int *col_idx,
    const float *values,
    const float *x,
    float *y)
{
    int row = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x;
    
    if (row < num_rows) {
        float dot = 0.0f;
        int row_start = row_ptr[row];
        int row_end = row_ptr[row + 1];
        
        // Compute dot product for this row
        for (int i = row_start; i < row_end; i++) {
            dot += values[i] * x[col_idx[i]];
        }
        
        y[row] = dot;
    }
}

// CPU implementation for verification
void spmv_csr_cpu(
    const int num_rows,
    const int *row_ptr,
    const int *col_idx,
    const float *values,
    const float *x,
    float *y)
{
    for (int row = 0; row < num_rows; row++) {
        float dot = 0.0f;
        int row_start = row_ptr[row];
        int row_end = row_ptr[row + 1];
        
        for (int i = row_start; i < row_end; i++) {
            dot += values[i] * x[col_idx[i]];
        }
        
        y[row] = dot;
    }
}

// Utility function to check results
bool verify_results(const float *a, const float *b, int size, float tolerance = 1e-5) {
    for (int i = 0; i < size; i++) {
        if (fabs(a[i] - b[i]) > tolerance) {
            printf("Mismatch at index %d: CPU = %f, GPU = %f\n", i, a[i], b[i]);
            return false;
        }
    }
    return true;
}

int main() {
    // Example CSR matrix
    int num_rows = 4;
    int num_cols = 4;
    int nnz = 8;  // Number of non-zero elements
    
    // CSR format arrays
    int h_row_ptr[5] = {0, 2, 4, 7, 8};  // size num_rows + 1
    int h_col_idx[8] = {0, 1, 1, 2, 0, 2, 3, 3};  // size nnz
    float h_values[8] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};  // size nnz
    
    // Input vector and result vectors
    float h_x[4] = {1.0, 2.0, 3.0, 4.0};  // size num_cols
    float h_y[4] = {0.0};  // size num_rows (GPU result)
    float h_y_cpu[4] = {0.0};  // size num_rows (CPU result for verification)
    
    // Allocate device memory
    int *d_row_ptr, *d_col_idx;
    float *d_values, *d_x, *d_y;
    
    hipMalloc((void**)&d_row_ptr, (num_rows + 1) * sizeof(int));
    hipMalloc((void**)&d_col_idx, nnz * sizeof(int));
    hipMalloc((void**)&d_values, nnz * sizeof(float));
    hipMalloc((void**)&d_x, num_cols * sizeof(float));
    hipMalloc((void**)&d_y, num_rows * sizeof(float));
    
    // Copy data to device
    hipMemcpy(d_row_ptr, h_row_ptr, (num_rows + 1) * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_col_idx, h_col_idx, nnz * sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_values, h_values, nnz * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_x, h_x, num_cols * sizeof(float), hipMemcpyHostToDevice);
    
    // Set kernel launch parameters
    int block_size = 256;
    int grid_size = (num_rows + block_size - 1) / block_size;
    
    // Launch kernel
    hipLaunchKernelGGL(spmv_csr_kernel, 
                      dim3(grid_size), 
                      dim3(block_size), 
                      0, 0,
                      num_rows, d_row_ptr, d_col_idx, d_values, d_x, d_y);
    
    // Check for kernel launch errors
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) {
        printf("Kernel launch error: %s\n", hipGetErrorString(err));
        return -1;
    }
    
    // Copy result back to host
    hipMemcpy(h_y, d_y, num_rows * sizeof(float), hipMemcpyDeviceToHost);
    
    // Compute CPU result for verification
    spmv_csr_cpu(num_rows, h_row_ptr, h_col_idx, h_values, h_x, h_y_cpu);
    
    // Verify results
    printf("Result vector:\n");
    for (int i = 0; i < num_rows; i++) {
        printf("y[%d] = %f\n", i, h_y[i]);
    }
    
    if (verify_results(h_y, h_y_cpu, num_rows)) {
        printf("Verification successful!\n");
    } else {
        printf("Verification failed!\n");
    }
    
    // Free device memory
    hipFree(d_row_ptr);
    hipFree(d_col_idx);
    hipFree(d_values);
    hipFree(d_x);
    hipFree(d_y);
    
    return 0;
}
	.text
	.file	"16.cpp"
	.globl	_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf # -- Begin function _Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf
	.p2align	4, 0x90
	.type	_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf,@function
_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf: # @_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf
	.cfi_startproc
# %bb.0:
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 4(%rsp)
	movq	%rsi, 88(%rsp)
	movq	%rdx, 80(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%r8, 64(%rsp)
	movq	%r9, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$168, %rsp
	.cfi_adjust_cfa_offset -168
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf, .Lfunc_end0-_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf # -- Begin function _Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	.p2align	4, 0x90
	.type	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf,@function
_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf:        # @_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB1_5
# %bb.1:                                # %.lr.ph25.preheader
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %eax
	xorl	%edi, %edi
	jmp	.LBB1_2
	.p2align	4, 0x90
.LBB1_3:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movss	%xmm0, (%r9,%rdi,4)
	incq	%rdi
	cmpq	%rax, %rdi
	je	.LBB1_4
.LBB1_2:                                # %.lr.ph25
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	movslq	(%rsi,%rdi,4), %r10
	movslq	4(%rsi,%rdi,4), %r11
	xorps	%xmm0, %xmm0
	cmpl	%r11d, %r10d
	jge	.LBB1_3
	.p2align	4, 0x90
.LBB1_6:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movslq	(%rdx,%r10,4), %rbx
	mulss	(%r8,%rbx,4), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	cmpq	%r10, %r11
	jne	.LBB1_6
	jmp	.LBB1_3
.LBB1_4:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB1_5:                                # %._crit_edge26
	retq
.Lfunc_end1:
	.size	_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf, .Lfunc_end1-_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z14verify_resultsPKfS0_if
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z14verify_resultsPKfS0_if
	.p2align	4, 0x90
	.type	_Z14verify_resultsPKfS0_if,@function
_Z14verify_resultsPKfS0_if:             # @_Z14verify_resultsPKfS0_if
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	testl	%edx, %edx
	setle	%bl
	jle	.LBB2_8
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %rax
	movss	(%rdi), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	(%rsi), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm3
	subss	%xmm2, %xmm3
	andps	.LCPI2_0(%rip), %xmm3
	xorl	%esi, %esi
	ucomiss	%xmm0, %xmm3
	ja	.LBB2_6
# %bb.2:                                # %.lr.ph36.preheader
	movl	%edx, %ecx
	leaq	-1(%rcx), %rdx
	xorl	%esi, %esi
	movaps	.LCPI2_0(%rip), %xmm3           # xmm3 = [NaN,NaN,NaN,NaN]
	.p2align	4, 0x90
.LBB2_3:                                # %.lr.ph36
                                        # =>This Inner Loop Header: Depth=1
	cmpq	%rsi, %rdx
	je	.LBB2_7
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB2_3 Depth=1
	movss	4(%rdi,%rsi,4), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	4(%rax,%rsi,4), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm4
	subss	%xmm2, %xmm4
	andps	%xmm3, %xmm4
	incq	%rsi
	ucomiss	%xmm0, %xmm4
	jbe	.LBB2_3
# %bb.5:                                # %.lr.ph._crit_edge
	cmpq	%rcx, %rsi
	setae	%bl
.LBB2_6:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm1
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	jmp	.LBB2_8
.LBB2_7:                                # %.loopexit.loopexit
	incq	%rsi
	cmpq	%rcx, %rsi
	setae	%bl
.LBB2_8:                                # %.loopexit
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z14verify_resultsPKfS0_if, .Lfunc_end2-_Z14verify_resultsPKfS0_if
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	4                               # 0x4
	.long	7                               # 0x7
.LCPI3_1:
	.long	0                               # 0x0
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	2                               # 0x2
.LCPI3_2:
	.long	0                               # 0x0
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	3                               # 0x3
.LCPI3_3:
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
.LCPI3_4:
	.long	0x40a00000                      # float 5
	.long	0x40c00000                      # float 6
	.long	0x40e00000                      # float 7
	.long	0x41000000                      # float 8
.LCPI3_5:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_6:
	.long	0x3727c5ac                      # float 9.99999974E-6
	.text
	.globl	main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$320, %rsp                      # imm = 0x140
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -16
	movaps	.LCPI3_0(%rip), %xmm0           # xmm0 = [0,2,4,7]
	movaps	%xmm0, 80(%rsp)
	movl	$8, 96(%rsp)
	movaps	.LCPI3_1(%rip), %xmm0           # xmm0 = [0,1,1,2]
	movaps	%xmm0, 288(%rsp)
	movaps	.LCPI3_2(%rip), %xmm0           # xmm0 = [0,2,3,3]
	movaps	%xmm0, 304(%rsp)
	movaps	.LCPI3_3(%rip), %xmm0           # xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
	movaps	%xmm0, 256(%rsp)
	movaps	.LCPI3_4(%rip), %xmm1           # xmm1 = [5.0E+0,6.0E+0,7.0E+0,8.0E+0]
	movaps	%xmm1, 272(%rsp)
	movaps	%xmm0, 192(%rsp)
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 48(%rsp)
	movaps	%xmm0, 64(%rsp)
	leaq	32(%rsp), %rdi
	movl	$20, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$16, %esi
	callq	hipMalloc
	movq	32(%rsp), %rdi
	leaq	80(%rsp), %rsi
	movl	$20, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	leaq	288(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	leaq	256(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	leaq	192(%rsp), %rsi
	movl	$16, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$4, 44(%rsp)
	movq	%rax, 184(%rsp)
	movq	%rcx, 176(%rsp)
	movq	%rdx, 168(%rsp)
	movq	%rsi, 160(%rsp)
	movq	%rdi, 152(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	152(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	136(%rsp), %rdi
	leaq	120(%rsp), %rsi
	leaq	112(%rsp), %rdx
	leaq	104(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	movq	120(%rsp), %rcx
	movl	128(%rsp), %r8d
	leaq	208(%rsp), %r9
	movl	$_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, %edi
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_2:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB3_4
# %bb.3:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %eax
	jmp	.LBB3_17
.LBB3_4:
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	jmp	.LBB3_5
	.p2align	4, 0x90
.LBB3_6:                                # %._crit_edge.i
                                        #   in Loop: Header=BB3_5 Depth=1
	movss	%xmm0, 64(%rsp,%rax,4)
	incq	%rax
	cmpq	$4, %rax
	je	.LBB3_7
.LBB3_5:                                # %.lr.ph25.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_18 Depth 2
	movslq	80(%rsp,%rax,4), %rcx
	movslq	84(%rsp,%rax,4), %rdx
	xorps	%xmm0, %xmm0
	cmpl	%edx, %ecx
	jge	.LBB3_6
	.p2align	4, 0x90
.LBB3_18:                               # %.lr.ph.i
                                        #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	256(%rsp,%rcx,4), %xmm1         # xmm1 = mem[0],zero,zero,zero
	movslq	288(%rsp,%rcx,4), %rsi
	mulss	192(%rsp,%rsi,4), %xmm1
	addss	%xmm1, %xmm0
	incq	%rcx
	cmpq	%rcx, %rdx
	jne	.LBB3_18
	jmp	.LBB3_6
.LBB3_7:                                # %_Z12spmv_csr_cpuiPKiS0_PKfS2_Pf.exit
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	.p2align	4, 0x90
.LBB3_8:                                # =>This Inner Loop Header: Depth=1
	movss	48(%rsp,%rbx,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB3_8
# %bb.9:                                # %.lr.ph.i34.preheader
	movss	48(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	64(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	.LCPI3_5(%rip), %xmm2
	xorl	%esi, %esi
	ucomiss	.LCPI3_6(%rip), %xmm2
	movl	$0, %ebx
	ja	.LBB3_14
# %bb.10:                               # %.lr.ph.preheader
	xorl	%esi, %esi
	movaps	.LCPI3_5(%rip), %xmm2           # xmm2 = [NaN,NaN,NaN,NaN]
	movss	.LCPI3_6(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	.p2align	4, 0x90
.LBB3_11:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$3, %rsi
	je	.LBB3_15
# %bb.12:                               # %.lr.ph.i34
                                        #   in Loop: Header=BB3_11 Depth=1
	movss	52(%rsp,%rsi,4), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movss	68(%rsp,%rsi,4), %xmm1          # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm4
	subss	%xmm1, %xmm4
	andps	%xmm2, %xmm4
	incq	%rsi
	ucomiss	%xmm3, %xmm4
	jbe	.LBB3_11
# %bb.13:                               # %.lr.ph.i34._crit_edge.loopexit
	leaq	-1(%rsi), %rax
	cmpq	$3, %rax
	setae	%bl
.LBB3_14:                               # %.lr.ph.i34._crit_edge
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	jmp	.LBB3_16
.LBB3_15:                               # %_Z14verify_resultsPKfS0_if.exit.loopexit
	setae	%bl
.LBB3_16:                               # %_Z14verify_resultsPKfS0_if.exit
	movl	$.Lstr.2, %eax
	movl	$.Lstr.1, %edi
	testb	%bl, %bl
	cmovneq	%rax, %rdi
	callq	puts@PLT
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
.LBB3_17:
	addq	$320, %rsp                      # imm = 0x140
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	movq	__hip_gpubin_handle(%rip), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf,@object # @_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.section	.rodata,"a",@progbits
	.globl	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.p2align	3, 0x0
_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf:
	.quad	_Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf
	.size	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Mismatch at index %d: CPU = %f, GPU = %f\n"
	.size	.L.str, 42

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Kernel launch error: %s\n"
	.size	.L.str.1, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"y[%d] = %f\n"
	.size	.L.str.3, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Result vector:"
	.size	.Lstr, 15

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Verification failed!"
	.size	.Lstr.1, 21

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Verification successful!"
	.size	.Lstr.2, 25

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__spmv_csr_kerneliPKiS0_PKfS2_Pf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf ; -- Begin function _Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.globl	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
	.p2align	8
	.type	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf,@function
_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf:     ; @_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_mov_b32 s3, exec_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v3, v4
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[4:5], s[0:1], 0x20
	v_ashrrev_i32_e32 v6, 31, v3
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v0, 0
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s10, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	.p2align	6
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	global_load_b32 v11, v[5:6], off
	global_load_b32 v9, v[9:10], off
	v_add_nc_u32_e32 v3, 1, v3
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v11, v9
	v_cmp_ge_i32_e64 s2, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s6, s2, s6
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_5:                                ; %Flow42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_load_b64 s[0:1], s[0:1], 0x28
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf, .Lfunc_end0-_Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15spmv_csr_kerneliPKiS0_PKfS2_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15spmv_csr_kerneliPKiS0_PKfS2_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
