#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>

// Kernel for the first step of prefix min scan
__global__ void prefixMinScan(int *d_in, int *d_out, int n, int stride) {
    int tid = blockIdx.x * blockDim.x + threadIdx.x;
    
    if (tid < n) {
        if (tid >= stride) {
            d_out[tid] = min(d_in[tid - stride], d_in[tid]);
        } else {
            d_out[tid] = d_in[tid];
        }
    }
}

// Main function for computing prefix min
void computePrefixMin(int *h_in, int *h_out, int n) {
    int *d_in, *d_out, *d_temp;
    int size = n * sizeof(int);
    
    // Allocate device memory
    cudaMalloc((void **)&d_in, size);
    cudaMalloc((void **)&d_out, size);
    cudaMalloc((void **)&d_temp, size);
    
    // Copy input from host to device
    cudaMemcpy(d_in, h_in, size, cudaMemcpyHostToDevice);
    
    // Calculate grid and block dimensions
    int blockSize = 256;
    int gridSize = (n + blockSize - 1) / blockSize;
    
    // Copy input to output initially
    cudaMemcpy(d_out, d_in, size, cudaMemcpyDeviceToDevice);
    
    // Perform prefix min scan using doubling algorithm
    for (int stride = 1; stride < n; stride *= 2) {
        prefixMinScan<<<gridSize, blockSize>>>(d_out, d_temp, n, stride);
        
        // Swap pointers
        int *d_swap = d_out;
        d_out = d_temp;
        d_temp = d_swap;
        
        // Synchronize to ensure previous kernel completes
        cudaDeviceSynchronize();
    }
    
    // Copy result back to host
    cudaMemcpy(h_out, d_out, size, cudaMemcpyDeviceToHost);
    
    // Free device memory
    cudaFree(d_in);
    cudaFree(d_out);
    cudaFree(d_temp);
}

// Example usage
int main() {
    const int n = 1024;
    int h_in[n], h_out[n];
    
    // Initialize input array with some values
    for (int i = 0; i < n; i++) {
        h_in[i] = rand() % 100;
    }
    
    // Compute prefix min
    computePrefixMin(h_in, h_out, n);
    
    // Verify results
    int min_so_far = h_in[0];
    bool correct = true;
    
    printf("Verification:\n");
    for (int i = 0; i < n; i++) {
        min_so_far = min(min_so_far, h_in[i]);
        if (h_out[i] != min_so_far) {
            printf("Error at index %d: expected %d, got %d\n", i, min_so_far, h_out[i]);
            correct = false;
        }
    }
    
    if (correct) {
        printf("Prefix min computation successful!\n");
    }
    
    return 0;
}
	.file	"tmpxft_00047eba_00000000-6_30.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB1983:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE1983:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii
	.type	_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii, @function
_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii:
.LFB2005:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13prefixMinScanPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2005:
	.size	_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii, .-_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii
	.globl	_Z13prefixMinScanPiS_ii
	.type	_Z13prefixMinScanPiS_ii, @function
_Z13prefixMinScanPiS_ii:
.LFB2006:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii
	.cfi_endproc
.LFE2006:
	.size	_Z13prefixMinScanPiS_ii, .-_Z13prefixMinScanPiS_ii
	.globl	_Z16computePrefixMinPiS_i
	.type	_Z16computePrefixMinPiS_i, @function
_Z16computePrefixMinPiS_i:
.LFB1979:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967552, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leal	0(,%rdx,4), %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%r12d, %r12
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r12, %rsi
	movl	%edx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %ebp
	call	cudaMemcpy@PLT
	leal	255(%rbx), %eax
	movl	$256, %ecx
	movq	8(%rsp), %rsi
	cltd
	movq	16(%rsp), %rdi
	idivl	%ecx
	movl	$3, %ecx
	movq	%r12, %rdx
	movl	%eax, %r14d
	call	cudaMemcpy@PLT
.L9:
	cmpl	%ebx, %ebp
	jge	.L14
	movl	%r14d, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	call	_Z37__device_stub__Z13prefixMinScanPiS_iiPiS_ii
.L10:
	movq	16(%rsp), %rax
	movq	24(%rsp), %rdx
	addl	%ebp, %ebp
	movq	%rdx, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaDeviceSynchronize@PLT
	jmp	.L9
.L14:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1979:
	.size	_Z16computePrefixMinPiS_i, .-_Z16computePrefixMinPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Verification:\n"
.LC1:
	.string	"Error at index %d: expected %d, got %d\n"
.LC2:
	.string	"Prefix min computation successful!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB1980:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4144
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8240
	orq	$0, (%rsp)
	subq	$16, %rsp
	.cfi_def_cfa_offset 8256
	xorl	%ebx, %ebx
	movq	%fs:40, %rax
	movq	%rax, 8200(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %r12
.L16:
	call	rand@PLT
	movl	$100, %ecx
	cltd
	idivl	%ecx
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$1024, %rbx
	jne	.L16
	leaq	4104(%rsp), %r13
	movl	$1024, %edx
	movq	%r12, %rdi
	xorl	%ebx, %ebx
	movq	%r13, %rsi
	leaq	.LC1(%rip), %r14
	call	_Z16computePrefixMinPiS_i
	movl	$1, %edi
	xorl	%eax, %eax
	movl	8(%rsp), %ebp
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	movb	$1, %al
.L18:
	movl	(%r12,%rbx,4), %ecx
	movl	0(%r13,%rbx,4), %r8d
	movl	%ebx, %edx
	cmpl	%ecx, %ebp
	cmovg	%ecx, %ebp
	cmpl	%ebp, %r8d
	je	.L17
	movl	%ebp, %ecx
	movq	%r14, %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L17:
	incq	%rbx
	cmpq	$1024, %rbx
	jne	.L18
	testb	%al, %al
	je	.L19
	leaq	.LC2(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	movq	8200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$8208, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1980:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z13prefixMinScanPiS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13prefixMinScanPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2008:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

// Kernel for the first step of prefix min scan
__global__ void prefixMinScan(int *d_in, int *d_out, int n, int stride) {
    int tid = hipBlockIdx_x * hipBlockDim_x + hipThreadIdx_x;
    
    if (tid < n) {
        if (tid >= stride) {
            d_out[tid] = min(d_in[tid - stride], d_in[tid]);
        } else {
            d_out[tid] = d_in[tid];
        }
    }
}

// Main function for computing prefix min
void computePrefixMin(int *h_in, int *h_out, int n) {
    int *d_in, *d_out, *d_temp;
    int size = n * sizeof(int);
    
    // Allocate device memory
    hipMalloc((void **)&d_in, size);
    hipMalloc((void **)&d_out, size);
    hipMalloc((void **)&d_temp, size);
    
    // Copy input from host to device
    hipMemcpy(d_in, h_in, size, hipMemcpyHostToDevice);
    
    // Calculate grid and block dimensions
    int blockSize = 256;
    int gridSize = (n + blockSize - 1) / blockSize;
    
    // Copy input to output initially
    hipMemcpy(d_out, d_in, size, hipMemcpyDeviceToDevice);
    
    // Perform prefix min scan using doubling algorithm
    for (int stride = 1; stride < n; stride *= 2) {
        hipLaunchKernelGGL(prefixMinScan, dim3(gridSize), dim3(blockSize), 0, 0, d_out, d_temp, n, stride);
        
        // Swap pointers
        int *d_swap = d_out;
        d_out = d_temp;
        d_temp = d_swap;
        
        // Synchronize to ensure previous kernel completes
        hipDeviceSynchronize();
    }
    
    // Copy result back to host
    hipMemcpy(h_out, d_out, size, hipMemcpyDeviceToHost);
    
    // Free device memory
    hipFree(d_in);
    hipFree(d_out);
    hipFree(d_temp);
}

// Example usage
int main() {
    const int n = 1024;
    int h_in[n], h_out[n];
    
    // Initialize input array with some values
    for (int i = 0; i < n; i++) {
        h_in[i] = rand() % 100;
    }
    
    // Compute prefix min
    computePrefixMin(h_in, h_out, n);
    
    // Verify results
    int min_so_far = h_in[0];
    bool correct = true;
    
    printf("Verification:\n");
    for (int i = 0; i < n; i++) {
        min_so_far = min(min_so_far, h_in[i]);
        if (h_out[i] != min_so_far) {
            printf("Error at index %d: expected %d, got %d\n", i, min_so_far, h_out[i]);
            correct = false;
        }
    }
    
    if (correct) {
        printf("Prefix min computation successful!\n");
    }
    
    return 0;
}
	.text
	.file	"30.cpp"
	.globl	_Z28__device_stub__prefixMinScanPiS_ii # -- Begin function _Z28__device_stub__prefixMinScanPiS_ii
	.p2align	4, 0x90
	.type	_Z28__device_stub__prefixMinScanPiS_ii,@function
_Z28__device_stub__prefixMinScanPiS_ii: # @_Z28__device_stub__prefixMinScanPiS_ii
	.cfi_startproc
# %bb.0:
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 72(%rsp)
	movq	%rsi, 64(%rsp)
	movl	%edx, 12(%rsp)
	movl	%ecx, 8(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z13prefixMinScanPiS_ii, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$136, %rsp
	.cfi_adjust_cfa_offset -136
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__prefixMinScanPiS_ii, .Lfunc_end0-_Z28__device_stub__prefixMinScanPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16computePrefixMinPiS_i       # -- Begin function _Z16computePrefixMinPiS_i
	.p2align	4, 0x90
	.type	_Z16computePrefixMinPiS_i,@function
_Z16computePrefixMinPiS_i:              # @_Z16computePrefixMinPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r15d
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	leal	(,%r15,4), %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	24(%rsp), %rdi
	movl	$1, %ebp
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	%r14, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	cmpl	$2, %r15d
	jl	.LBB1_5
# %bb.1:                                # %.lr.ph
	movabsq	$4294967296, %r12               # imm = 0x100000000
	leal	255(%r15), %r13d
	shrl	$8, %r13d
	orq	%r12, %r13
	addq	$256, %r12                      # imm = 0x100
	leaq	112(%rsp), %rbx
	jmp	.LBB1_2
	.p2align	4, 0x90
.LBB1_4:                                #   in Loop: Header=BB1_2 Depth=1
	movq	8(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	%rcx, 8(%rsp)
	movq	%rax, 16(%rsp)
	callq	hipDeviceSynchronize
	addl	%ebp, %ebp
	cmpl	%r15d, %ebp
	jge	.LBB1_5
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=1
	movq	8(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	%rax, 104(%rsp)
	movq	%rcx, 96(%rsp)
	movl	%r15d, 36(%rsp)
	movl	%ebp, 32(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	80(%rsp), %rdi
	leaq	64(%rsp), %rsi
	leaq	56(%rsp), %rdx
	leaq	48(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	movq	64(%rsp), %rcx
	movl	72(%rsp), %r8d
	movl	$_Z13prefixMinScanPiS_ii, %edi
	movq	%rbx, %r9
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	jmp	.LBB1_4
.LBB1_5:                                # %._crit_edge
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z16computePrefixMinPiS_i, .Lfunc_end1-_Z16computePrefixMinPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$8192, %rsp                     # imm = 0x2000
	.cfi_def_cfa_offset 8224
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	.p2align	4, 0x90
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rsp,%rbx,4)
	incq	%rbx
	cmpq	$1024, %rbx                     # imm = 0x400
	jne	.LBB2_1
# %bb.2:
	movq	%rsp, %rdi
	leaq	4096(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z16computePrefixMinPiS_i
	movl	(%rsp), %ebx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movb	$1, %bpl
	xorl	%r14d, %r14d
	jmp	.LBB2_3
	.p2align	4, 0x90
.LBB2_5:                                #   in Loop: Header=BB2_3 Depth=1
	incq	%r14
	cmpq	$1024, %r14                     # imm = 0x400
	je	.LBB2_6
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	movl	(%rsp,%r14,4), %ebx
	cmpl	%ebx, %eax
	cmovll	%eax, %ebx
	movl	4096(%rsp,%r14,4), %ecx
	cmpl	%ebx, %ecx
	je	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=1
	xorl	%ebp, %ebp
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_5
.LBB2_6:
	testb	$1, %bpl
	je	.LBB2_8
# %bb.7:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB2_8:
	xorl	%eax, %eax
	addq	$8192, %rsp                     # imm = 0x2000
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	movq	__hip_gpubin_handle(%rip), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13prefixMinScanPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13prefixMinScanPiS_ii,@object # @_Z13prefixMinScanPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z13prefixMinScanPiS_ii
	.p2align	3, 0x0
_Z13prefixMinScanPiS_ii:
	.quad	_Z28__device_stub__prefixMinScanPiS_ii
	.size	_Z13prefixMinScanPiS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Error at index %d: expected %d, got %d\n"
	.size	.L.str.1, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13prefixMinScanPiS_ii"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Verification:"
	.size	.Lstr, 14

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Prefix min computation successful!"
	.size	.Lstr.1, 35

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__prefixMinScanPiS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13prefixMinScanPiS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13prefixMinScanPiS_ii ; -- Begin function _Z13prefixMinScanPiS_ii
	.globl	_Z13prefixMinScanPiS_ii
	.p2align	8
	.type	_Z13prefixMinScanPiS_ii,@function
_Z13prefixMinScanPiS_ii:                ; @_Z13prefixMinScanPiS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x14
	s_load_b64 s[2:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr0
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 s5, v1
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_subrev_nc_u32_e32 v3, s5, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[3:4], off
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0)
	v_min_i32_e32 v0, v0, v3
.LBB0_3:                                ; %Flow
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
.LBB0_5:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b64 s[0:1], s[0:1], 0x8
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13prefixMinScanPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13prefixMinScanPiS_ii, .Lfunc_end0-_Z13prefixMinScanPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13prefixMinScanPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13prefixMinScanPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
