#include <stdio.h>
#include <cuda_runtime.h>

// Define the maximum stack size
#define STACK_SIZE 1024
#define NUM_THREADS 256
#define NUM_BLOCKS 32

// Stack structure
typedef struct {
    int data[STACK_SIZE];
    int top;
} Stack;

// Initialize the stack
__host__ void initStack(Stack* stack) {
    stack->top = -1;
}

// GPU kernel for concurrent push operations
__global__ void concurrentPush(Stack* stack, int* values, int numValues, int* results) {
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    
    if (tid < numValues) {
        int value = values[tid];
        int oldTop = atomicAdd(&stack->top, 1);
        
        if (oldTop < STACK_SIZE - 1) {
            stack->data[oldTop + 1] = value;
            results[tid] = 1; // Success
        } else {
            // Stack is full, rollback
            atomicSub(&stack->top, 1);
            results[tid] = 0; // Failure
        }
    }
}

// GPU kernel for concurrent pop operations
__global__ void concurrentPop(Stack* stack, int* results, int numOps) {
    int tid = threadIdx.x + blockIdx.x * blockDim.x;
    
    if (tid < numOps) {
        int oldTop = atomicSub(&stack->top, 1);
        
        if (oldTop >= 0) {
            results[tid] = stack->data[oldTop];
        } else {
            // Stack is empty, rollback
            atomicAdd(&stack->top, 1);
            results[tid] = -1; // Failure indicator
        }
    }
}

int main() {
    // Allocate host memory
    Stack h_stack;
    initStack(&h_stack);
    
    int h_values[NUM_THREADS * NUM_BLOCKS];
    int h_push_results[NUM_THREADS * NUM_BLOCKS];
    int h_pop_results[NUM_THREADS * NUM_BLOCKS];
    
    // Initialize test values
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        h_values[i] = i + 1;
        h_push_results[i] = 0;
        h_pop_results[i] = 0;
    }
    
    // Allocate device memory
    Stack* d_stack;
    int* d_values;
    int* d_push_results;
    int* d_pop_results;
    
    cudaMalloc((void**)&d_stack, sizeof(Stack));
    cudaMalloc((void**)&d_values, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    cudaMalloc((void**)&d_push_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    cudaMalloc((void**)&d_pop_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    
    // Copy data to device
    cudaMemcpy(d_stack, &h_stack, sizeof(Stack), cudaMemcpyHostToDevice);
    cudaMemcpy(d_values, h_values, sizeof(int) * NUM_THREADS * NUM_BLOCKS, cudaMemcpyHostToDevice);
    
    // Launch push kernel
    concurrentPush<<<NUM_BLOCKS, NUM_THREADS>>>(d_stack, d_values, NUM_THREADS * NUM_BLOCKS, d_push_results);
    
    // Wait for completion
    cudaDeviceSynchronize();
    
    // Copy push results back to host
    cudaMemcpy(h_push_results, d_push_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS, cudaMemcpyDeviceToHost);
    
    // Print push results summary
    int successfulPushes = 0;
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        if (h_push_results[i] == 1) {
            successfulPushes++;
        }
    }
    printf("Successful pushes: %d out of %d\n", successfulPushes, NUM_THREADS * NUM_BLOCKS);
    
    // Launch pop kernel
    concurrentPop<<<NUM_BLOCKS, NUM_THREADS>>>(d_stack, d_pop_results, NUM_THREADS * NUM_BLOCKS);
    
    // Wait for completion
    cudaDeviceSynchronize();
    
    // Copy pop results back to host
    cudaMemcpy(h_pop_results, d_pop_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS, cudaMemcpyDeviceToHost);
    
    // Print pop results summary
    int successfulPops = 0;
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        if (h_pop_results[i] != -1) {
            successfulPops++;
        }
    }
    printf("Successful pops: %d out of %d\n", successfulPops, NUM_THREADS * NUM_BLOCKS);
    
    // Clean up
    cudaFree(d_stack);
    cudaFree(d_values);
    cudaFree(d_push_results);
    cudaFree(d_pop_results);
    
    return 0;
}
	.file	"tmpxft_00047f8a_00000000-6_36.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB1983:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE1983:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9initStackP5Stack
	.type	_Z9initStackP5Stack, @function
_Z9initStackP5Stack:
.LFB1979:
	.cfi_startproc
	endbr64
	movl	$-1, 4096(%rdi)
	ret
	.cfi_endproc
.LFE1979:
	.size	_Z9initStackP5Stack, .-_Z9initStackP5Stack
	.globl	_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_
	.type	_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_, @function
_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_:
.LFB2005:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14concurrentPushP5StackPiiS1_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2005:
	.size	_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_, .-_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_
	.globl	_Z14concurrentPushP5StackPiiS1_
	.type	_Z14concurrentPushP5StackPiiS1_, @function
_Z14concurrentPushP5StackPiiS1_:
.LFB2006:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_
	.cfi_endproc
.LFE2006:
	.size	_Z14concurrentPushP5StackPiiS1_, .-_Z14concurrentPushP5StackPiiS1_
	.globl	_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii
	.type	_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii, @function
_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii:
.LFB2007:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13concurrentPopP5StackPii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2007:
	.size	_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii, .-_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii
	.globl	_Z13concurrentPopP5StackPii
	.type	_Z13concurrentPopP5StackPii, @function
_Z13concurrentPopP5StackPii:
.LFB2008:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii
	.cfi_endproc
.LFE2008:
	.size	_Z13concurrentPopP5StackPii, .-_Z13concurrentPopP5StackPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Successful pushes: %d out of %d\n"
.LC1:
	.string	"Successful pops: %d out of %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB1980:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	-102400(%rsp), %r11
	.cfi_def_cfa 11, 102432
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$80, %rsp
	.cfi_def_cfa_offset 102512
	movq	%fs:40, %rax
	movq	%rax, 102472(%rsp)
	xorl	%eax, %eax
	movl	$1, %eax
	movl	$-1, 4164(%rsp)
.L15:
	movl	%eax, 4164(%rsp,%rax,4)
	incq	%rax
	leaq	4168(%rsp), %r13
	cmpq	$8193, %rax
	jne	.L15
	leaq	36936(%rsp), %r12
	xorl	%eax, %eax
	movl	$8192, %ecx
	movl	$4100, %esi
	movq	%r12, %rdi
	leaq	69704(%rsp), %rbp
	rep stosl
	movl	$8192, %ecx
	movq	%rbp, %rdi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$32768, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	leaq	68(%rsp), %rsi
	movl	$1, %ecx
	movl	$4100, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$32768, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$134217729, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$5, %rdi
	movq	%rdx, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rsi
	movl	$8192, %edx
	movq	8(%rsp), %rdi
	call	_Z45__device_stub__Z14concurrentPushP5StackPiiS1_P5StackPiiS1_
.L16:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$32768, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorl	%edx, %edx
.L18:
	cmpl	$1, (%r12,%rax,4)
	jne	.L17
	incl	%edx
.L17:
	incq	%rax
	cmpq	$8192, %rax
	jne	.L18
	movl	$8192, %ecx
	leaq	.LC0(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$134217729, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$5, %rdi
	movq	%rdx, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$8192, %edx
	call	_Z41__device_stub__Z13concurrentPopP5StackPiiP5StackPii
.L19:
	call	cudaDeviceSynchronize@PLT
	movq	32(%rsp), %rsi
	movl	$32768, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorl	%edx, %edx
.L21:
	cmpl	$-1, 0(%rbp,%rax,4)
	je	.L20
	incl	%edx
.L20:
	incq	%rax
	cmpq	$8192, %rax
	jne	.L21
	movl	$8192, %ecx
	leaq	.LC1(%rip), %rsi
	movl	$1, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	102472(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$102480, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE1980:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z13concurrentPopP5StackPii"
.LC3:
	.string	"_Z14concurrentPushP5StackPiiS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbp
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13concurrentPopP5StackPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbp, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14concurrentPushP5StackPiiS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

// Define the maximum stack size
#define STACK_SIZE 1024
#define NUM_THREADS 256
#define NUM_BLOCKS 32

// Stack structure
typedef struct {
    int data[STACK_SIZE];
    int top;
} Stack;

// Initialize the stack
void initStack(Stack* stack) {
    stack->top = -1;
}

// GPU kernel for concurrent push operations
__global__ void concurrentPush(Stack* stack, int* values, int numValues, int* results) {
    int tid = hipThreadIdx_x + hipBlockIdx_x * hipBlockDim_x;
    
    if (tid < numValues) {
        int value = values[tid];
        int oldTop = atomicAdd(&stack->top, 1);
        
        if (oldTop < STACK_SIZE - 1) {
            stack->data[oldTop + 1] = value;
            results[tid] = 1; // Success
        } else {
            // Stack is full, rollback
            atomicSub(&stack->top, 1);
            results[tid] = 0; // Failure
        }
    }
}

// GPU kernel for concurrent pop operations
__global__ void concurrentPop(Stack* stack, int* results, int numOps) {
    int tid = hipThreadIdx_x + hipBlockIdx_x * hipBlockDim_x;
    
    if (tid < numOps) {
        int oldTop = atomicSub(&stack->top, 1);
        
        if (oldTop >= 0) {
            results[tid] = stack->data[oldTop];
        } else {
            // Stack is empty, rollback
            atomicAdd(&stack->top, 1);
            results[tid] = -1; // Failure indicator
        }
    }
}

int main() {
    // Allocate host memory
    Stack h_stack;
    initStack(&h_stack);
    
    int h_values[NUM_THREADS * NUM_BLOCKS];
    int h_push_results[NUM_THREADS * NUM_BLOCKS];
    int h_pop_results[NUM_THREADS * NUM_BLOCKS];
    
    // Initialize test values
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        h_values[i] = i + 1;
        h_push_results[i] = 0;
        h_pop_results[i] = 0;
    }
    
    // Allocate device memory
    Stack* d_stack;
    int* d_values;
    int* d_push_results;
    int* d_pop_results;
    
    hipMalloc((void**)&d_stack, sizeof(Stack));
    hipMalloc((void**)&d_values, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    hipMalloc((void**)&d_push_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    hipMalloc((void**)&d_pop_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS);
    
    // Copy data to device
    hipMemcpy(d_stack, &h_stack, sizeof(Stack), hipMemcpyHostToDevice);
    hipMemcpy(d_values, h_values, sizeof(int) * NUM_THREADS * NUM_BLOCKS, hipMemcpyHostToDevice);
    
    // Launch push kernel
    hipLaunchKernelGGL(concurrentPush, 
                      dim3(NUM_BLOCKS), 
                      dim3(NUM_THREADS), 
                      0, 
                      0, 
                      d_stack, 
                      d_values, 
                      NUM_THREADS * NUM_BLOCKS, 
                      d_push_results);
    
    // Wait for completion
    hipDeviceSynchronize();
    
    // Copy push results back to host
    hipMemcpy(h_push_results, d_push_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS, hipMemcpyDeviceToHost);
    
    // Print push results summary
    int successfulPushes = 0;
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        if (h_push_results[i] == 1) {
            successfulPushes++;
        }
    }
    printf("Successful pushes: %d out of %d\n", successfulPushes, NUM_THREADS * NUM_BLOCKS);
    
    // Launch pop kernel
    hipLaunchKernelGGL(concurrentPop, 
                      dim3(NUM_BLOCKS), 
                      dim3(NUM_THREADS), 
                      0, 
                      0, 
                      d_stack, 
                      d_pop_results, 
                      NUM_THREADS * NUM_BLOCKS);
    
    // Wait for completion
    hipDeviceSynchronize();
    
    // Copy pop results back to host
    hipMemcpy(h_pop_results, d_pop_results, sizeof(int) * NUM_THREADS * NUM_BLOCKS, hipMemcpyDeviceToHost);
    
    // Print pop results summary
    int successfulPops = 0;
    for (int i = 0; i < NUM_THREADS * NUM_BLOCKS; i++) {
        if (h_pop_results[i] != -1) {
            successfulPops++;
        }
    }
    printf("Successful pops: %d out of %d\n", successfulPops, NUM_THREADS * NUM_BLOCKS);
    
    // Clean up
    hipFree(d_stack);
    hipFree(d_values);
    hipFree(d_push_results);
    hipFree(d_pop_results);
    
    return 0;
}
	.text
	.file	"36.cpp"
	.globl	_Z9initStackP5Stack             # -- Begin function _Z9initStackP5Stack
	.p2align	4, 0x90
	.type	_Z9initStackP5Stack,@function
_Z9initStackP5Stack:                    # @_Z9initStackP5Stack
	.cfi_startproc
# %bb.0:
	movl	$-1, 4096(%rdi)
	retq
.Lfunc_end0:
	.size	_Z9initStackP5Stack, .Lfunc_end0-_Z9initStackP5Stack
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__concurrentPushP5StackPiiS1_ # -- Begin function _Z29__device_stub__concurrentPushP5StackPiiS1_
	.p2align	4, 0x90
	.type	_Z29__device_stub__concurrentPushP5StackPiiS1_,@function
_Z29__device_stub__concurrentPushP5StackPiiS1_: # @_Z29__device_stub__concurrentPushP5StackPiiS1_
	.cfi_startproc
# %bb.0:
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 72(%rsp)
	movq	%rsi, 64(%rsp)
	movl	%edx, 4(%rsp)
	movq	%rcx, 56(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	40(%rsp), %rdi
	leaq	24(%rsp), %rsi
	leaq	16(%rsp), %rdx
	leaq	8(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	40(%rsp), %rsi
	movl	48(%rsp), %edx
	movq	24(%rsp), %rcx
	movl	32(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z14concurrentPushP5StackPiiS1_, %edi
	pushq	8(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$136, %rsp
	.cfi_adjust_cfa_offset -136
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__concurrentPushP5StackPiiS1_, .Lfunc_end1-_Z29__device_stub__concurrentPushP5StackPiiS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__concurrentPopP5StackPii # -- Begin function _Z28__device_stub__concurrentPopP5StackPii
	.p2align	4, 0x90
	.type	_Z28__device_stub__concurrentPopP5StackPii,@function
_Z28__device_stub__concurrentPopP5StackPii: # @_Z28__device_stub__concurrentPopP5StackPii
	.cfi_startproc
# %bb.0:
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 72(%rsp)
	movq	%rsi, 64(%rsp)
	movl	%edx, 12(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	80(%rsp), %r9
	movl	$_Z13concurrentPopP5StackPii, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$120, %rsp
	.cfi_adjust_cfa_offset -120
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__concurrentPopP5StackPii, .Lfunc_end2-_Z28__device_stub__concurrentPopP5StackPii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$102568, %rsp                   # imm = 0x190A8
	.cfi_def_cfa_offset 102608
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$-1, 4252(%rsp)
	leaq	37024(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$32768, %edx                    # imm = 0x8000
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	4256(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	xorl	%esi, %esi
	callq	memset@PLT
	.p2align	4, 0x90
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%rbx), %rax
	movl	%eax, 69792(%rsp,%rbx,4)
	movq	%rax, %rbx
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB3_1
# %bb.2:
	movabsq	$4294967328, %rbx               # imm = 0x100000020
	movq	%rsp, %rdi
	movl	$4100, %esi                     # imm = 0x1004
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$32768, %esi                    # imm = 0x8000
	callq	hipMalloc
	movq	(%rsp), %rdi
	leaq	156(%rsp), %rsi
	movl	$4100, %edx                     # imm = 0x1004
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	leaq	69792(%rsp), %rsi
	movl	$32768, %edx                    # imm = 0x8000
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	224(%rbx), %r14
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	%rax, 96(%rsp)
	movq	%rcx, 88(%rsp)
	movl	$8192, 108(%rsp)                # imm = 0x2000
	movq	%rdx, 48(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	108(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	72(%rsp), %rdi
	leaq	56(%rsp), %rsi
	leaq	40(%rsp), %rdx
	leaq	32(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	movq	56(%rsp), %rcx
	movl	64(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z14concurrentPushP5StackPiiS1_, %edi
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_4:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	leaq	37024(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	.p2align	4, 0x90
.LBB3_5:                                # =>This Inner Loop Header: Depth=1
	xorl	%ecx, %ecx
	cmpl	$1, 37024(%rsp,%rax,4)
	sete	%cl
	addl	%ecx, %r12d
	incq	%rax
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB3_5
# %bb.6:
	xorl	%r15d, %r15d
	movl	$.L.str, %edi
	movl	%r12d, %esi
	movl	$8192, %edx                     # imm = 0x2000
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	%rax, 96(%rsp)
	movq	%rcx, 88(%rsp)
	movl	$8192, 32(%rsp)                 # imm = 0x2000
	leaq	96(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	72(%rsp), %rdi
	leaq	56(%rsp), %rsi
	leaq	48(%rsp), %rdx
	leaq	40(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	movq	56(%rsp), %rcx
	movl	64(%rsp), %r8d
	leaq	112(%rsp), %r9
	movl	$_Z13concurrentPopP5StackPii, %edi
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	leaq	4256(%rsp), %rdi
	movl	$32768, %edx                    # imm = 0x8000
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	.p2align	4, 0x90
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	xorl	%ecx, %ecx
	cmpl	$-1, 4256(%rsp,%rax,4)
	setne	%cl
	addl	%ecx, %r15d
	incq	%rax
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB3_9
# %bb.10:
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movl	$8192, %edx                     # imm = 0x2000
	xorl	%eax, %eax
	callq	printf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$102568, %rsp                   # imm = 0x190A8
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	movq	__hip_gpubin_handle(%rip), %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14concurrentPushP5StackPiiS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13concurrentPopP5StackPii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14concurrentPushP5StackPiiS1_,@object # @_Z14concurrentPushP5StackPiiS1_
	.section	.rodata,"a",@progbits
	.globl	_Z14concurrentPushP5StackPiiS1_
	.p2align	3, 0x0
_Z14concurrentPushP5StackPiiS1_:
	.quad	_Z29__device_stub__concurrentPushP5StackPiiS1_
	.size	_Z14concurrentPushP5StackPiiS1_, 8

	.type	_Z13concurrentPopP5StackPii,@object # @_Z13concurrentPopP5StackPii
	.globl	_Z13concurrentPopP5StackPii
	.p2align	3, 0x0
_Z13concurrentPopP5StackPii:
	.quad	_Z28__device_stub__concurrentPopP5StackPii
	.size	_Z13concurrentPopP5StackPii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Successful pushes: %d out of %d\n"
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Successful pops: %d out of %d\n"
	.size	.L.str.1, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14concurrentPushP5StackPiiS1_"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13concurrentPopP5StackPii"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__concurrentPushP5StackPiiS1_
	.addrsig_sym _Z28__device_stub__concurrentPopP5StackPii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14concurrentPushP5StackPiiS1_
	.addrsig_sym _Z13concurrentPopP5StackPii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14concurrentPushP5StackPiiS1_ ; -- Begin function _Z14concurrentPushP5StackPiiS1_
	.globl	_Z14concurrentPushP5StackPiiS1_
	.p2align	8
	.type	_Z14concurrentPushP5StackPiiS1_,@function
_Z14concurrentPushP5StackPiiS1_:        ; @_Z14concurrentPushP5StackPiiS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_10
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_add_u32 s2, s4, 0x1000
	s_addc_u32 s3, s5, 0
	s_mov_b32 s6, exec_lo
	global_load_b32 v0, v[3:4], off
	v_mbcnt_lo_u32_b32 v3, s8, 0
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_bcnt1_i32_b32 s7, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s7
	global_atomic_add_u32 v4, v4, v5, s[2:3] glc
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s6, v3
                                        ; implicit-def: $sgpr6
	v_cmpx_lt_i32_e32 0x3fe, v3
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB0_7
; %bb.4:
	s_mov_b32 s9, exec_lo
	s_mov_b32 s6, 0
	v_mbcnt_lo_u32_b32 v0, s9, 0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:
	s_bcnt1_i32_b32 s9, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s9, 0, s9
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s9
	global_atomic_add_u32 v0, v3, s[2:3]
.LBB0_6:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr0
.LBB0_7:                                ; %Flow25
	s_or_saveexec_b32 s2, s7
	v_mov_b32_e32 v4, s6
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, v3, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v4, 1
	global_store_b32 v[5:6], v0, off offset:4
.LBB0_9:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x18
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14concurrentPushP5StackPiiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14concurrentPushP5StackPiiS1_, .Lfunc_end0-_Z14concurrentPushP5StackPiiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 400
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13concurrentPopP5StackPii ; -- Begin function _Z13concurrentPopP5StackPii
	.globl	_Z13concurrentPopP5StackPii
	.p2align	8
	.type	_Z13concurrentPopP5StackPii,@function
_Z13concurrentPopP5StackPii:            ; @_Z13concurrentPopP5StackPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_10
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v0, s6, 0
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s4, s2, 0x1000
	s_addc_u32 s5, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_3
; %bb.2:
	s_bcnt1_i32_b32 s6, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s6, 0, s6
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s6
	global_atomic_add_u32 v2, v2, v3, s[4:5] glc
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v2
                                        ; implicit-def: $sgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, s6, v0
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_i32_e32 0, v2
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB1_7
; %bb.4:
	s_mov_b32 s8, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_6
; %bb.5:
	s_bcnt1_i32_b32 s8, s8
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v2, s8
	global_atomic_add_u32 v0, v2, s[4:5]
.LBB1_6:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr2
.LBB1_7:                                ; %Flow20
	s_or_saveexec_b32 s4, s6
	v_mov_b32_e32 v0, s7
	s_xor_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[2:3], off
.LBB1_9:                                ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b64 s[0:1], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
.LBB1_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13concurrentPopP5StackPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13concurrentPopP5StackPii, .Lfunc_end1-_Z13concurrentPopP5StackPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14concurrentPushP5StackPiiS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14concurrentPushP5StackPiiS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13concurrentPopP5StackPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13concurrentPopP5StackPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
