// rigid_body_update.cu
#include <cuda_runtime.h>
#include <iostream>

#define CHECK_CUDA(call) \
    if ((call) != cudaSuccess) { \
        std::cerr << "CUDA error at " << __FILE__ << ":" << __LINE__ << std::endl; \
        exit(1); \
    }

struct Vec3 {
    float x, y, z;
};

__global__ void update_rigid_bodies(
    Vec3* positions,
    Vec3* velocities,
    const Vec3* forces,
    const float* masses,
    float dt,
    int num_bodies
) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= num_bodies) return;

    Vec3 force = forces[idx];
    float mass = masses[idx];

    // Compute acceleration
    Vec3 accel = { force.x / mass, force.y / mass, force.z / mass };

    // Update velocity
    velocities[idx].x += accel.x * dt;
    velocities[idx].y += accel.y * dt;
    velocities[idx].z += accel.z * dt;

    // Update position
    positions[idx].x += velocities[idx].x * dt;
    positions[idx].y += velocities[idx].y * dt;
    positions[idx].z += velocities[idx].z * dt;
}

int main() {
    const int num_bodies = 1024;
    const float dt = 0.01f;

    Vec3 *h_positions = new Vec3[num_bodies];
    Vec3 *h_velocities = new Vec3[num_bodies];
    Vec3 *h_forces = new Vec3[num_bodies];
    float *h_masses = new float[num_bodies];

    // Initialize data
    for (int i = 0; i < num_bodies; ++i) {
        h_positions[i] = {0.0f, 0.0f, 0.0f};
        h_velocities[i] = {0.0f, 0.0f, 0.0f};
        h_forces[i] = {1.0f, 0.0f, 0.0f}; // Constant force along x-axis
        h_masses[i] = 1.0f; // Unit mass
    }

    Vec3 *d_positions, *d_velocities, *d_forces;
    float *d_masses;
    CHECK_CUDA(cudaMalloc(&d_positions, num_bodies * sizeof(Vec3)));
    CHECK_CUDA(cudaMalloc(&d_velocities, num_bodies * sizeof(Vec3)));
    CHECK_CUDA(cudaMalloc(&d_forces, num_bodies * sizeof(Vec3)));
    CHECK_CUDA(cudaMalloc(&d_masses, num_bodies * sizeof(float)));

    CHECK_CUDA(cudaMemcpy(d_positions, h_positions, num_bodies * sizeof(Vec3), cudaMemcpyHostToDevice));
    CHECK_CUDA(cudaMemcpy(d_velocities, h_velocities, num_bodies * sizeof(Vec3), cudaMemcpyHostToDevice));
    CHECK_CUDA(cudaMemcpy(d_forces, h_forces, num_bodies * sizeof(Vec3), cudaMemcpyHostToDevice));
    CHECK_CUDA(cudaMemcpy(d_masses, h_masses, num_bodies * sizeof(float), cudaMemcpyHostToDevice));

    dim3 block(256);
    dim3 grid((num_bodies + block.x - 1) / block.x);

    update_rigid_bodies<<<grid, block>>>(d_positions, d_velocities, d_forces, d_masses, dt, num_bodies);
    CHECK_CUDA(cudaDeviceSynchronize());

    CHECK_CUDA(cudaMemcpy(h_positions, d_positions, num_bodies * sizeof(Vec3), cudaMemcpyDeviceToHost));
    CHECK_CUDA(cudaMemcpy(h_velocities, d_velocities, num_bodies * sizeof(Vec3), cudaMemcpyDeviceToHost));

    std::cout << "First body position: (" 
              << h_positions[0].x << ", " 
              << h_positions[0].y << ", " 
              << h_positions[0].z << ")\n";

    // Cleanup
    cudaFree(d_positions);
    cudaFree(d_velocities);
    cudaFree(d_forces);
    cudaFree(d_masses);
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;
    delete[] h_masses;

    return 0;
}

	.file	"tmpxft_00047f20_00000000-6_33.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3377:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3377:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4013:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4013:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi
	.type	_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi, @function
_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi:
.LFB3399:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movss	%xmm0, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L3:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3399:
	.size	_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi, .-_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi
	.globl	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.type	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, @function
_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi:
.LFB3400:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi
	.cfi_endproc
.LFE3400:
	.size	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, .-_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error at "
.LC3:
	.string	"33.cu"
.LC4:
	.string	":"
.LC6:
	.string	"First body position: ("
.LC7:
	.string	", "
.LC8:
	.string	")\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3374:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$12288, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$12288, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$12288, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4096, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movss	.LC1(%rip), %xmm0
	movq	%rax, %r14
	movq	%rax, %rdx
	xorl	%eax, %eax
.L10:
	movl	$0x00000000, 0(%rbp,%rax)
	addq	$4, %rdx
	movl	$0x00000000, 4(%rbp,%rax)
	movl	$0x00000000, 8(%rbp,%rax)
	movl	$0x00000000, (%r12,%rax)
	movl	$0x00000000, 4(%r12,%rax)
	movl	$0x00000000, 8(%r12,%rax)
	movl	$0x00000000, 4(%r13,%rax)
	movl	$0x00000000, 8(%r13,%rax)
	movss	%xmm0, 0(%r13,%rax)
	addq	$12, %rax
	movss	%xmm0, -4(%rdx)
	cmpq	$12288, %rax
	jne	.L10
	movq	%rsp, %rdi
	movl	$12288, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$62, %esi
	movq	%rax, %rdi
	jmp	.L26
.L11:
	leaq	8(%rsp), %rdi
	movl	$12288, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L12
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$63, %esi
	movq	%rax, %rdi
.L26:
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$1, %edi
	call	exit@PLT
.L12:
	leaq	16(%rsp), %rdi
	movl	$12288, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$64, %esi
	movq	%rax, %rdi
	jmp	.L26
.L13:
	leaq	24(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L14
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$65, %esi
	movq	%rax, %rdi
	jmp	.L26
.L14:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$12288, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L15
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$67, %esi
	movq	%rax, %rdi
	jmp	.L26
.L15:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$12288, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L16
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$68, %esi
	movq	%rax, %rdi
	jmp	.L26
.L16:
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$12288, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L17
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$69, %esi
	movq	%rax, %rdi
	jmp	.L26
.L17:
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$4096, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L18
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$70, %esi
	movq	%rax, %rdi
	jmp	.L26
.L18:
	movl	$16777217, %edx
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$1024, %r8d
	movss	.LC5(%rip), %xmm0
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z55__device_stub__Z19update_rigid_bodiesP4Vec3S0_PKS_PKffiP4Vec3S0_PKS_PKffi
.L19:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L20
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$76, %esi
	movq	%rax, %rdi
	jmp	.L26
.L20:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$12288, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L21
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$78, %esi
	movq	%rax, %rdi
	jmp	.L26
.L21:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$12288, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L22
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$79, %esi
	movq	%rax, %rdi
	jmp	.L26
.L22:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC7(%rip), %r15
	cvtss2sd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	4(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	8(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%r14, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3374:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3402:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3402:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text.startup
	.type	_GLOBAL__sub_I_main, @function
_GLOBAL__sub_I_main:
.LFB4010:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	_ZStL8__ioinit(%rip), %rbp
	movq	%rbp, %rdi
	call	_ZNSt8ios_base4InitC1Ev@PLT
	movq	_ZNSt8ios_base4InitD1Ev@GOTPCREL(%rip), %rdi
	movq	%rbp, %rsi
	popq	%rbp
	.cfi_def_cfa_offset 8
	leaq	__dso_handle(%rip), %rdx
	jmp	__cxa_atexit@PLT
	.cfi_endproc
.LFE4010:
	.size	_GLOBAL__sub_I_main, .-_GLOBAL__sub_I_main
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZStL8__ioinit
	.comm	_ZStL8__ioinit,1,1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.align 4
.LC5:
	.long	1008981770
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// rigid_body_update.hip.cpp
#include <hip/hip_runtime.h>
#include <iostream>

#define CHECK_HIP(call) \
    if ((call) != hipSuccess) { \
        std::cerr << "HIP error at " << __FILE__ << ":" << __LINE__ << std::endl; \
        exit(1); \
    }

struct Vec3 {
    float x, y, z;
};

__global__ void update_rigid_bodies(
    Vec3* positions,
    Vec3* velocities,
    const Vec3* forces,
    const float* masses,
    float dt,
    int num_bodies
) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= num_bodies) return;

    Vec3 force = forces[idx];
    float mass = masses[idx];

    // Compute acceleration
    Vec3 accel = { force.x / mass, force.y / mass, force.z / mass };

    // Update velocity
    velocities[idx].x += accel.x * dt;
    velocities[idx].y += accel.y * dt;
    velocities[idx].z += accel.z * dt;

    // Update position
    positions[idx].x += velocities[idx].x * dt;
    positions[idx].y += velocities[idx].y * dt;
    positions[idx].z += velocities[idx].z * dt;
}

int main() {
    const int num_bodies = 1024;
    const float dt = 0.01f;

    Vec3 *h_positions = new Vec3[num_bodies];
    Vec3 *h_velocities = new Vec3[num_bodies];
    Vec3 *h_forces = new Vec3[num_bodies];
    float *h_masses = new float[num_bodies];

    // Initialize data
    for (int i = 0; i < num_bodies; ++i) {
        h_positions[i] = {0.0f, 0.0f, 0.0f};
        h_velocities[i] = {0.0f, 0.0f, 0.0f};
        h_forces[i] = {1.0f, 0.0f, 0.0f}; // Constant force along x-axis
        h_masses[i] = 1.0f; // Unit mass
    }

    Vec3 *d_positions, *d_velocities, *d_forces;
    float *d_masses;
    CHECK_HIP(hipMalloc(&d_positions, num_bodies * sizeof(Vec3)));
    CHECK_HIP(hipMalloc(&d_velocities, num_bodies * sizeof(Vec3)));
    CHECK_HIP(hipMalloc(&d_forces, num_bodies * sizeof(Vec3)));
    CHECK_HIP(hipMalloc(&d_masses, num_bodies * sizeof(float)));

    CHECK_HIP(hipMemcpy(d_positions, h_positions, num_bodies * sizeof(Vec3), hipMemcpyHostToDevice));
    CHECK_HIP(hipMemcpy(d_velocities, h_velocities, num_bodies * sizeof(Vec3), hipMemcpyHostToDevice));
    CHECK_HIP(hipMemcpy(d_forces, h_forces, num_bodies * sizeof(Vec3), hipMemcpyHostToDevice));
    CHECK_HIP(hipMemcpy(d_masses, h_masses, num_bodies * sizeof(float), hipMemcpyHostToDevice));

    dim3 block(256);
    dim3 grid((num_bodies + block.x - 1) / block.x);

    hipLaunchKernelGGL(update_rigid_bodies, grid, block, 0, 0, d_positions, d_velocities, d_forces, d_masses, dt, num_bodies);
    CHECK_HIP(hipDeviceSynchronize());

    CHECK_HIP(hipMemcpy(h_positions, d_positions, num_bodies * sizeof(Vec3), hipMemcpyDeviceToHost));
    CHECK_HIP(hipMemcpy(h_velocities, d_velocities, num_bodies * sizeof(Vec3), hipMemcpyDeviceToHost));

    std::cout << "First body position: (" 
              << h_positions[0].x << ", " 
              << h_positions[0].y << ", " 
              << h_positions[0].z << ")\n";

    // Cleanup
    hipFree(d_positions);
    hipFree(d_velocities);
    hipFree(d_forces);
    hipFree(d_masses);
    delete[] h_positions;
    delete[] h_velocities;
    delete[] h_forces;
    delete[] h_masses;

    return 0;
}

	.text
	.file	"33.cpp"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi # -- Begin function _Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.p2align	4, 0x90
	.type	_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi,@function
_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi: # @_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.cfi_startproc
# %bb.0:
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 88(%rsp)
	movq	%rsi, 80(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rcx, 64(%rsp)
	movss	%xmm0, 12(%rsp)
	movl	%r8d, 8(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rdi
	leaq	32(%rsp), %rsi
	leaq	24(%rsp), %rdx
	leaq	16(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	movq	32(%rsp), %rcx
	movl	40(%rsp), %r8d
	leaq	96(%rsp), %r9
	movl	$_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, %edi
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$168, %rsp
	.cfi_adjust_cfa_offset -168
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi, .Lfunc_end0-_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.p2align	4, 0x90
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$12288, %edi                    # imm = 0x3000
	callq	_Znam
	movq	%rax, %rbx
	movl	$12288, %edi                    # imm = 0x3000
	callq	_Znam
	movq	%rax, %r14
	movl	$12288, %edi                    # imm = 0x3000
	callq	_Znam
	movq	%rax, %r15
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znam
	movq	%rax, %r12
	xorl	%r13d, %r13d
	movl	$12288, %edx                    # imm = 0x3000
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$12288, %edx                    # imm = 0x3000
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, %rax
	addq	$8, %rax
	.p2align	4, 0x90
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	$1065353216, -8(%rax)           # imm = 0x3F800000
	movl	$0, (%rax)
	movl	$1065353216, (%r12,%r13,4)      # imm = 0x3F800000
	incq	%r13
	addq	$12, %rax
	cmpq	$1024, %r13                     # imm = 0x400
	jne	.LBB1_1
# %bb.2:
	leaq	16(%rsp), %rdi
	movl	$12288, %esi                    # imm = 0x3000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:
	leaq	8(%rsp), %rdi
	movl	$12288, %esi                    # imm = 0x3000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	leaq	32(%rsp), %rdi
	movl	$12288, %esi                    # imm = 0x3000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	leaq	24(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	movq	16(%rsp), %rdi
	movl	$12288, %edx                    # imm = 0x3000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movq	8(%rsp), %rdi
	movl	$12288, %edx                    # imm = 0x3000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movq	32(%rsp), %rdi
	movl	$12288, %edx                    # imm = 0x3000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_16
# %bb.17:
	movq	24(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	leaq	252(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.20:
	movq	16(%rsp), %rax
	movq	8(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%rax, 120(%rsp)
	movq	%rcx, 112(%rsp)
	movq	%rdx, 104(%rsp)
	movq	%rsi, 96(%rsp)
	movl	$1008981770, 44(%rsp)           # imm = 0x3C23D70A
	movl	$1024, 40(%rsp)                 # imm = 0x400
	leaq	120(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rdi
	leaq	64(%rsp), %rsi
	leaq	56(%rsp), %rdx
	leaq	48(%rsp), %rcx
	callq	__hipPopCallConfiguration
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	movq	64(%rsp), %rcx
	movl	72(%rsp), %r8d
	leaq	128(%rsp), %r9
	movl	$_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, %edi
	pushq	48(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_21:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.23:
	movq	16(%rsp), %rsi
	movl	$12288, %edx                    # imm = 0x3000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movq	8(%rsp), %rsi
	movl	$12288, %edx                    # imm = 0x3000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.27:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.4, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	4(%rbx), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	cvtss2sd	%xmm0, %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.4, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	8(%rbx), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	cvtss2sd	%xmm0, %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$176, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 224
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$62, %esi
	jmp	.LBB1_4
.LBB1_6:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$63, %esi
	jmp	.LBB1_4
.LBB1_8:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$64, %esi
	jmp	.LBB1_4
.LBB1_10:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$65, %esi
	jmp	.LBB1_4
.LBB1_12:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$67, %esi
	jmp	.LBB1_4
.LBB1_14:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$68, %esi
	jmp	.LBB1_4
.LBB1_16:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$69, %esi
	jmp	.LBB1_4
.LBB1_18:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$70, %esi
	jmp	.LBB1_4
.LBB1_22:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$76, %esi
	jmp	.LBB1_4
.LBB1_24:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$78, %esi
	jmp	.LBB1_4
.LBB1_26:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	$79, %esi
.LBB1_4:
	callq	_ZNSolsEi
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpq	$0, __hip_gpubin_handle(%rip)
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	movq	__hip_gpubin_handle(%rip), %rdi
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi,@object # @_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.section	.rodata,"a",@progbits
	.globl	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.p2align	3, 0x0
_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi:
	.quad	_Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.size	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"HIP error at "
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"33.cpp"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	":"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"First body position: ("
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	", "
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	")\n"
	.size	.L.str.5, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.section	".linker-options","e",@llvm_linker_options
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi ; -- Begin function _Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.globl	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
	.p2align	8
	.type	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi,@function
_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi: ; @_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_i64_i32 v[6:7], null, v1, 12, 0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s0, s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v4, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v6
	global_load_b96 v[0:2], v[2:3], off
	global_load_b32 v10, v[4:5], off
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v7, vcc_lo
	global_load_b96 v[3:5], v[8:9], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v11, null, v10, v10, v0
	v_div_scale_f32 v12, null, v10, v10, v1
	v_div_scale_f32 v13, null, v10, v10, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v14, v11
	v_rcp_f32_e32 v15, v12
	v_div_scale_f32 v17, vcc_lo, v0, v10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v16, v13
	v_div_scale_f32 v18, s2, v1, v10, v1
	v_div_scale_f32 v22, s3, v2, v10, v2
	v_fma_f32 v19, -v11, v14, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v12, v15, 1.0
	v_fma_f32 v21, -v13, v16, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v14, v19, v14 :: v_dual_fmac_f32 v15, v20, v15
	v_dual_mul_f32 v19, v17, v14 :: v_dual_mul_f32 v20, v18, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v23, -v11, v19, v17
	v_fmac_f32_e32 v16, v21, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v24, -v12, v20, v18
	v_fmac_f32_e32 v19, v23, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v21, v22, v16 :: v_dual_fmac_f32 v20, v24, v15
	v_fma_f32 v11, -v11, v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v25, -v13, v21, v22
	v_fma_f32 v12, -v12, v20, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v11, v11, v14, v19
	v_fmac_f32_e32 v21, v25, v16
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v12, v12, v15, v20
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v13, -v13, v21, v22
	v_div_fixup_f32 v0, v11, v10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v1, v12, v10, v1
	v_div_fmas_f32 v13, v13, v16, v21
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_waitcnt vmcnt(0)
	v_fma_f32 v3, s0, v0, v3
	v_fma_f32 v4, s0, v1, v4
	v_div_fixup_f32 v2, v13, v10, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v5, s0, v2
	global_store_b96 v[8:9], v[3:5], off
	global_load_b96 v[0:2], v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v2, s0, v5
	v_fma_f32 v0, s0, v3, v0
	v_fma_f32 v1, s0, v4, v1
	global_store_b96 v[6:7], v[0:2], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi, .Lfunc_end0-_Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 544
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19update_rigid_bodiesP4Vec3S0_PKS_PKffi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
